• 한국산학기술학회논문지
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• 제12권7호
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• pp.3275-3279
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• 2011

유무선망 상호접속 서비스 제공을 통한 통화요금의 사업자별 배부가 서비스 설비원가에 의하여 많은 부분이 정의되는 점을 고려한다면 망 설비를 통하여 제공되는 서비스들의 통화량 기준에 의한 평가가 이루어져야 한다. 이러한 관점에서 이동통신망 설비를 음성, 데이터서비스를 위한 전용설비와 공통설비로 구분하고, 공통설비는 합리적 기준에 의한 서비스별 설비원가의 배부 방법의 도출이 필수적이다. 본 논문에서는 유럽 GSM 시스템에서 이용되고 있는 이동통신망 공통설비 원가 배부 방안 분석을 통하여 국내 CDMA 이동망의 공통설비 원가 배부를 위한 회선 음성 서비스와 패킷 데이터서비스간의 단일 통화량으로 계측하기 위한 서비스간 환산계수 방안을 도출하였다.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회 2005년도 추계학술대회 및 정기총회
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• pp.388-393
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• 2005

Private peering, public peering and transit are three common types of interconnection agreements between providers in the Internet. An important decision that an Internet service provider (ISP) has to make is which private peering/transit ISPs and Internet exchanges (IXs) to connect with to transfer traffic at a minimal cost. In this paper, we deal with the problem to find the minimum cost set of private peering/transit ISPs and IXs for a single ISP. There are given a set of destinations with traffic demands, and a set of potential private peering/transit ISPs and IXs with routing information (routes per destination, the average AS-hop count to each destination, etc.), cost functions and capacities. Our study first considers all the three interconnection types commonly used in real world practices. We show that the problem is NP-hard, and propose a heuristic algorithm for it. We then evaluate the quality of the heuristic solutions for a set of test instances via comparison with the optimal ones obtained by solving a mixed integer programming formulation of the problem. Computational results show that the proposed algorithm provides near-optimal solutions in a fast time.

• Journal of information and communication convergence engineering
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• 제20권3호
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• pp.160-165
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• 2022

This paper proposes an efficient method of reconstructing interconnections when the terminals of each plane change in real-time situations where randomly divided planes are interconnected. To connect all terminals when the terminals of each plane are changed, we usually reconstruct the interconnections between all terminals. This ensures a minimum connection length, but it takes considerable time to reconstruct the interconnection for the entire terminal. This paper proposes a solution to obtain an optimal tree close to the minimum spanning tree (MST) in a short time. The construction of interconnections has been used in various design-related areas, from networks to architecture. One of these areas is an ad hoc network that only consists of mobile hosts and communicates with each other without a fixed wired network. Each host of an ad hoc network may appear or disappear frequently. Therefore, the heuristic proposed in this paper may expect various cost savings through faster interconnection reconstruction using the given information in situations where the connection target is changing.

• 한국통신학회논문지
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• 제40권4호
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• pp.678-691
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• 2015

최근 정보통신 생태계는 스마트 기기의 대중화와 대용량 데이터 스트리밍을 필요로 하는 다양한 인터넷 서비스들의 출현과 함께 인터넷 및 모바일 데이터 트래픽이 급속도로 증가하게 되었다. 이에 따라 원활한 인터넷 접속문제, 네트워크의 혼잡 및 정체, 그리고 통신사업자들의 지속적인 네트워크 투자 비용증대 등 다양한 문제들이 초래되었다. 이렇게 데이터 중심의 패러다임으로 변화된 통신 생태계 속에서 초기 상호접속체제들은 사업자들 간 균형 있는 혜택과 공정한 분배 그리고 차세대 네트워크 구축을 위한 경제적 유인을 형성할 수 없다는 측면에서 논란이 가중되고 있다. 따라서 더욱 복잡해진 All-IP 네트워크 환경에 부합할 수 있는 진화된 인터넷 상호접속체제의 도입이 필요한 상황이다. 이에 본 연구에서는 국내 인터넷 상호접속제도의 핵심이슈를 발굴하고 인터넷 초기에서 현재까지의 인터넷 상호접속체제를 전반적으로 분석한 후, 실증연구를 통하여 트래픽 최적화, 비용 최적화, 네트워크 투자 최적화의 세 가지 측면에 부합될 수 있는 인터넷 상호접속체제를 제시하고자 한다.

• 한국정보처리학회논문지
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• 제6권3호
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• pp.571-579
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• 1999

A Macro-Star graph which has a star graph as a basic module has node symmetry, maximum fault tolerance, and hierarchical decomposition property. And, it is an interconnection network which improves a network cost against a star graph. A matrix star graph also has such good properties of a Macro-Star graph and is an interconnection network which has a lower network cost than a Maco-Star graph. In this paper, we propose a method to embed between a Macro-Star graph and a matrix star graph. We show that a Macro-Star graph MS(k, n) can be embedded into a matrix star graph MS\ulcorner with dilation 2. In addition, we show that a matrix star graph MS\ulcorner can be embedded into a Macro-Star graph MS(k,n+1) with dilation 4 and average dilation 3 or less as well. This result means that several algorithms developed in a star graph can be simulated in a matrix star graph with constant cost.

• 신재생에너지
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• 제16권3호
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• pp.1-12
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• 2020

Shingled technology is the latest cell interconnection technology developed in the photovoltaic (PV) industry due to its reduced resistance loss, low-cost, and innovative electrically conductive adhesive (ECA). There are several advantages associated with shingled technology to develop cell to module (CTM) such as the module area enlargement, low processing temperature, and interconnection; these advantages further improves the energy yield capacity. This review paper provides valuable insight into CTM loss when cells are interconnected by shingled technology to form modules. The fill factor (FF) had improved, further reducing electrical power loss compared to the conventional module interconnection technology. The commercial PV module technology was mainly focused on different performance parameters; the module maximum power point (Pmpp), and module efficiency. The module was then subjected to anti-reflection (AR) coating and encapsulant material to absorb infrared (IR) and ultraviolet (UV) light, which can increase the overall efficiency of the shingled module by up to 24.4%. Module fabrication by shingled interconnection technology uses EGaIn paste; this enables further increases in output power under standard test conditions. Previous research has demonstrated that a total module output power of approximately 400 Wp may be achieved using shingled technology and CTM loss may be reduced to 0.03%, alongside the low cost of fabrication.

• 마이크로전자및패키징학회지
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• 제6권4호
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• pp.61-71
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• 1999

통신분야에서 사용주파수대역의 증가, 제품의 소형화 및 가격경쟁력등의 요구에 따라 RF 소자의 패키징 기술도 플라스틱 패키지 대신에 flip chip interconnection, MCM(multichip module)등과 같은 고밀도 실장기술이 발전해가고 있다. 따라서, 본 논문은 최근 수년간 보고된 응용사례를 중심으로 RF flip chip의 기술적인 개발방향과 장점들을 분석하였고, RF 소자 및 시스템의 개발단계에 따른 적합한 적용기술을 제시하였다. RF flip chip의 기술동향을 요약하면, 1) RF chip배선은 microstrip 대신에 CPW 구조을 선택하며, 2) wafer back-side grinding을 하지 않아서 제조공정이 단순하고 wafer 파손이 적어 제조비용을 낮출 수 있고, 3) wire bonding 패키징에 비해 전기적인 특성이 우수하고 고집적의 송수신 모듈개발에 적합하다는 것이다. 그러나, CPW 배선구조의 RF flip chip 특성에 대한 충분한 연구가 필요하며 RF flip chip의 초기 개발 단계에서 flip chip interconnection 방법으로는 Au stud bump bonding이 적합할 것으로 제안한다.

• 마이크로전자및패키징학회지
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• 제6권2호
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• pp.13-21
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• 1999

Flip chip assembly directly on organic boards offers miniaturization of package size as well as reduction in interconnection distances resulting in a high performance and cost-competitive Packaging method. This paper describes the investigation of alternative low cost flip-chip mounting processes using electroless Ni/Au bump and anisotropic conductive adhesives/films as an interconnection material on organic boards such as FR-4. As bumps for flip chip, electroless Ni/Au plating was performed and characterized in mechanical and metallurgical point of view. Effect of annealing on Ni bump characteristics informed that the formation of crystalline nickel with $Ni_3$P precipitation above $300^{\circ}C$ causes an increase of hardness and an increase of the intrinsic stress resulting in a reliability limitation. As an interconnection material, modified ACFs composed of nickel conductive fillers for electrical conductor and non-conductive inorganic fillers for modification of film properties such as coefficient of thermal expansion(CTE) and tensile strength were formulated for improved electrical and mechanical properties of ACF interconnection. The thermal fatigue life of ACA/F flip chip on organic board limited by the thermal expansion mismatch between the chip and the board could be increased by a modified ACA/F. Three ACF materials with different CTE values were prepared and bonded between Si chip and FR-4 board for the thermal strain measurement using moire interferometry. The thermal strain of ACF interconnection layer induced by temperature excursion of $80^{\circ}C$ was decreased with decreasing CTEs of ACF materials.

• ETRI Journal
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• 제35권6호
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• pp.1152-1155
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• 2013

A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

• 마이크로전자및패키징학회지
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• 제19권4호
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• pp.13-18
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• 2012

By the need for high-speed data transmission in PCB, the studies on the optical PCB has been conducted with optical interconnection and its packaging technology. Particularly, the polymer-based optical interconnection has been extensively studied with the advantages such as cost-effective and ease of process. For high-efficiency and passive alignment, the studies were performed using the 45 degree mirrors, MT connector, and etc. In this work, integrated PLC device and fiber alignment array block was fabricated by using imprint technology to solve the alignment and array problem of optical device and the optical fiber. The fabricated integrated block for optical interconnection of PLC device has achieved higher precision of decreasing the dimensional error of the patterns by optimization of process and its insertion loss has an average value of 4.03dB, lower than criteria specified by international standard. In addition, a optical waveguide with built-in lens has been proposed for high-efficiency and passive alignment. By simulation, it was confirmed that the proposed structure has higher coupling efficiency than conventional no-lens structure and has the broad tolerance for the spatial offset of optical waveguide.