• Title/Summary/Keyword: Integrated verification

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Design of Integrated Verification Process for Sending Data Gathering System (센싱 데이터 수집 시스템을 위한 통합검증 프로세스 설계)

  • Kim, Yu-Doo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.10a
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    • pp.305-306
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    • 2021
  • It has been designed very complex that gathering system for various sending data. Therefore it is very important that verification process of these functions. In this paper we design of integrated verification process for sensing data gathering system.

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Hardware/Software Co-verification with Integrated Verification (집적검증 기법을 채용한 하드웨어/소프트웨어 동시검증)

  • Lee, Young-Soo;Yang, Se-Yang
    • Journal of KIISE:Computing Practices and Letters
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    • v.8 no.3
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    • pp.261-267
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    • 2002
  • In SOC(System On a Chip) designs, reducing time and cast for design verification is the most critical to improve the design productivity. this is mainly because the designs require co-verifying HW together with SW, which results in the increase of verification complexity drastically. In this paper, to cope with the verification crisis in SOC designs, we propose a new verification methodology, so called integrated co-verification, which lightly combine both co-simulation and co-emulation in unified and seamless way. We have applied our integrated co-verification to ARM/AMBA platform-based co-verification environment with a commercial co-verification tool, Seamless CVE, and a physical prototyping board. The experiments has shown clear advantage of the proposed technique over conventional ones.

Efficient Public Verification on the Integrity of Multi-Owner Data in the Cloud

  • Wang, Boyang;Li, Hui;Liu, Xuefeng;Li, Fenghua;Li, Xiaoqing
    • Journal of Communications and Networks
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    • v.16 no.6
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    • pp.592-599
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    • 2014
  • Cloud computing enables users to easily store their data and simply share data with others. Due to the security threats in an untrusted cloud, users are recommended to compute verification metadata, such as signatures, on their data to protect the integrity. Many mechanisms have been proposed to allow a public verifier to efficiently audit cloud data integrity without receiving the entire data from the cloud. However, to the best of our knowledge, none of them has considered about the efficiency of public verification on multi-owner data, where each block in data is signed by multiple owners. In this paper, we propose a novel public verification mechanism to audit the integrity of multi-owner data in an untrusted cloud by taking the advantage of multisignatures. With our mechanism, the verification time and storage overhead of signatures on multi-owner data in the cloud are independent with the number of owners. In addition, we demonstrate the security of our scheme with rigorous proofs. Compared to the straightforward extension of previous mechanisms, our mechanism shows a better performance in experiments.

Verification of Hierarchically Structured Avionics System Utilizing Multi-Mode System Integration Laboratory (다중모드 통합시험환경을 이용한 계층구조 항공전자시스템의 검증)

  • Chang, Woohyuk;Park, Jae Seong;Jo, Young Wo;Byun, Jinku
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.45 no.11
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    • pp.998-1005
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    • 2017
  • In this paper, we first introduce a systematic verification procedure for hierarchically structured avionics system. By making use of equipment models, it can perform individual verifications of each subsystem, integrated verifications of multiple subsystems, and an integrated verification of a whole system. A multi-mode system integration laboratory is then proposed to make it possible to execute various individual or integrated verification tests at the same time. By mathematically proving that the proposed multi-mode system integration laboratory needs less verification time than the conventional verification methodology, it is expected to enhance the efficiency of the systematic verification procedure and as a result, reduce the overall verification period and costs.

SoC Front-end 설계를 위한 통합 환경

  • 김기선;김성식;이희연;김기현;채재호
    • The Magazine of the IEIE
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    • v.30 no.9
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    • pp.1002-1011
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    • 2003
  • In this paper, we introduce an integrated SoC front-end design & verification environment which can be practically used in the embedded 32-bit processor-core SoC VLSI design. Our introduced SoC design & verification environment integrates two most important flows, such as the RTL power estimation and code coverage analysis, with the functional verification (chip validation) flow which is used in the conventional simulation-based design. For this, we developed two simulation-based inhouse tools, RTL power estimator and code coverage analyzer, and used them to adopt them to our RTL design and to increase the design quality of that. Our integrated design environment also includes basic design and verification flows such as the gate-level functional verification with back annotation information and test vector capture & replay environment.

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An Adaptive Utterance Verification Framework Using Minimum Verification Error Training

  • Shin, Sung-Hwan;Jung, Ho-Young;Juang, Biing-Hwang
    • ETRI Journal
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    • v.33 no.3
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    • pp.423-433
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    • 2011
  • This paper introduces an adaptive and integrated utterance verification (UV) framework using minimum verification error (MVE) training as a new set of solutions suitable for real applications. UV is traditionally considered an add-on procedure to automatic speech recognition (ASR) and thus treated separately from the ASR system model design. This traditional two-stage approach often fails to cope with a wide range of variations, such as a new speaker or a new environment which is not matched with the original speaker population or the original acoustic environment that the ASR system is trained on. In this paper, we propose an integrated solution to enhance the overall UV system performance in such real applications. The integration is accomplished by adapting and merging the target model for UV with the acoustic model for ASR based on the common MVE principle at each iteration in the recognition stage. The proposed iterative procedure for UV model adaptation also involves revision of the data segmentation and the decoded hypotheses. Under this new framework, remarkable enhancement in not only recognition performance, but also verification performance has been obtained.

Development of Control Simulator for Integrated Sensor Module of Vehicle (차량용 통합 센서 모듈 제어를 위한 시뮬레이터 개발)

  • Jeon, Jin-Young;Park, Jeong-Yeon;Byun, Hyung-Gi
    • Journal of Sensor Science and Technology
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    • v.22 no.1
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    • pp.65-70
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    • 2013
  • The integrated sensor module of vehicle combines the functions of rain sensor, auto defog sensor, and sun angle sensor into a single module. These functions originally were applied to work separatively. This integrated sensor module should meet the each performance which appears from the individual modules up to the same level or higher. Therefore, it is important to verify the stability and the accuracy considering the characteristics of the integrated sensor module according to various situations. For the verification, we need to use the actual data of integrated sensor module measured but, a lot of time and money is needed to collect data measured under various circumstances when operating. Thus, through the development of this simulator for the control of the integrated sensor module, we can use it effectively for the initial verification of integrated sensor module by implementing the various situations. In this paper, the simulator for controlling the integrated sensor module which combines vision-based rain sensor, auto defog sensor, auto light sensor, and sun angle sensor has been developed.

A fast code acquisition using integrated search and verification (ISV) scheme in the DS-SS system (DS-SS시스템에서 탐색과정과 확인과정을 통합하는 (ISV) 고속부호 포착 시스템)

  • 오성근;임종혁;성상헌;최태영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.5
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    • pp.24-30
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    • 1996
  • In this paper, we propose a fast code acquisition method that can reduce drastically the mean acquisition time of the direct sequence spread spectrum (DS-SS) system by using and integrated search and verification (ISV) scheme. The proposed method performs simultaneously the search and verification processes at every search cell, through storing sufficiently long signal samples enough to perform the verification process form the previously received samples. We analyze and acquisition performance in the case of Gaussian channel to evaluate theacquisition perfomrance of the proposed method. From the simple numericl analysis result, we have shown that the acquisition performance of the proposed method is better than that of the conventional serial search method, and the performance improvement becomes more prominent as the channel environment becomes degraded.

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A Privacy-preserving Data Aggregation Scheme with Efficient Batch Verification in Smart Grid

  • Zhang, Yueyu;Chen, Jie;Zhou, Hua;Dang, Lanjun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.2
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    • pp.617-636
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    • 2021
  • This paper presents a privacy-preserving data aggregation scheme deals with the multidimensional data. It is essential that the multidimensional data is rarely mentioned in all researches on smart grid. We use the Paillier Cryptosystem and blinding factor technique to encrypt the multidimensional data as a whole and take advantage of the homomorphic property of the Paillier Cryptosystem to achieve data aggregation. Signature and efficient batch verification have also been applied into our scheme for data integrity and quick verification. And the efficient batch verification only requires 2 pairing operations. Our scheme also supports fault tolerance which means that even some smart meters don't work, our scheme can still work well. In addition, we give two extensions of our scheme. One is that our scheme can be used to compute a fixed user's time-of-use electricity bill. The other is that our scheme is able to effectively and quickly deal with the dynamic user situation. In security analysis, we prove the detailed unforgeability and security of batch verification, and briefly introduce other security features. Performance analysis shows that our scheme has lower computational complexity and communication overhead than existing schemes.

V&V of Integrated Interoperability System for LVC Simulation on Aircraft Weapon System (항공무기체계 LVC 시뮬레이션을 위한 통합연동시스템 V&V)

  • Oh, Jihyun;Jang, Young Chan;Kim, Cheon Young;Jee, Cheol Kyu;Hong, Young Seok
    • Journal of the Korea Institute of Military Science and Technology
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    • v.18 no.3
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    • pp.326-334
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    • 2015
  • This paper describes the verification and the validation about the development of the integrated interoperability system for live, virtual, and constructive simulations on the aircraft weapon system. The proposed integrated interoperability system provides the framework and application softwares for implementing a synthetic environment emulating real-world environment among distributed simulation models, which are a mission model and an air combat model of a constructive level, an tactical simulator of a virtual level, and simulated ACMI of a live level. In this paper, we verify requested functions through an developmental test and evaluation, and validate operability and usability through conducing integrated LVC scenarios on the integrated interoperability system.