• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.3
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• pp.12-24
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• 2001

The key advantage of LTCC(low temperature co-fired ceramics) technology is the ability to integrate passive components such as resistors, capacitors, and inductors. More compact circuits with an increased scale of integration are needed with the development for advanced telecommunication system such as IMT-2000. LTCC technology can be obtained by removing these elements from the substrate surface to inside of ceramic body. And it can miniaturize the wireless phone through integration of planar patch antenna, duplexer, band pass filter, bias line, circuit of impedance matching and RF choke etc. Futhermore, with the multilayer chip process and its outstanding electrical material characteristics, LTCC is predestined for highly-integrated, cost effective wide band applications. This paper focuses on the general description of LTCC MCM technologies and the fabrication of the multilayer VCO module.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.217-218
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• 2008

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. A general method for achieving both reduced VCO gain(Kvco) and wide frequency band is to use the switched-capacitor bank LC VCO. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO with reduced variation of VCO gain and frequency steps. Buffers, divide-by-2 circuits and control logics the simulation results show that the designed circuit has a phase noise at 100kHz better than -106dBc/Hz throughout the signal band and consumes $9.5{\sim}13mA$ from a 1.8V supply.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.387-390
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• 1998

In this paper, HBT's with lower phase noise and passive elements, such as resistors, capacitors and inductors, for resonance and impedance matching networks are designed, fabricated, tested, and carefully analysed, respectively, and then, they are integrated for the design and fabrication of functional X-band oscillators with lower phase noise. Epi-wafers for HBT's with the structure of graded $Al_{x}$G $a_{1-x}$ As emitter and C-doped base layer of 700.angs. thick were used to specially emphasize the improvement of $f_{T}$ and $f_{max}$, and the lowering of phase noise, in design aspects. At the test frequencies of 12GHz, capacitances of MIM capacitors, spiral inductor, and resistances are 0.5~10pF, 0.4~11.06nH, and 20~1,380.ohm., respectively. The emitter size of HBY's for the X-band MMIC oscillators is 3*10u $m^{2}$, and find chip size is 0.9*0.9m $m^{2}$..EX>.

• Journal of electromagnetic engineering and science
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• v.9 no.1
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• pp.25-31
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• 2009

This paper describes CMOS VCO circuit design procedures and techniques for multi-band/multi-standard RF transceivers. The proposed techniques enable a 4 GHz CMOS VCO to satisfy all requirements for Quad-band GSMIEDGE and WCDMA standards by achieving a good trade-off among important specifications, phase noise, power consumption, modulation performance, and chip area efficiency. To meet the very stringent GSM T/Rx phase noise and wide frequency range specifications, the VCO utilizes bond-wire inductors with high-quality factor, an 8-bit coarse tune capbank for low VCO gain(30$\sim$50 MHz/V) and an on-chip $2^{nd}$ harmonic noise filter. The proposed VCO is implemented in $0.13{\mu}m$ CMOS technology. The measured tuning range is about 34 %(3.17 to 4.49 GHz). The VCO exhibits a phase noise of -123 dBc/Hz at 400 kHz offset and -145 dBc/Hz at 3 MHz offset from a 900 MHz carrier after LO chain. The calculated figure of merit(FOM) is -183.5 dBc/Hz at 3 MHz offset. This fully integrated VCO occupies $0.45{\times}0.9\;mm^2$.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.195-196
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• 2007

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO, five divide-by-2 circuits and several buffers. The simulation results show that the designed circuit has a phase noise at 10kHz better than -87dBc/Hz throughout the signal band and consumes 10mA from a 1.8V supply.

• KIEE International Transactions on Electrophysics and Applications
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• v.5C no.4
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• pp.176-179
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• 2005

The increasing demand for high density packaging technologies and the evolution to mixed digital and analogue devices has been the con-set of increasing research in thin film multi-layer technologies such as the passive components integration technology. In this paper, Cu and TaO thin film with RF sputtering was deposited for spiral inductor and MOM capacitor on the $SiO_2$/Si(100) substrate. MOM capacitor and spiral inductor were fabricated for L-C band pass filter by sputtering and lift-off. We are analyzed and designed thin films L-C passive components for band pass filter at 900 MHz and 1.8 GHz, important devices for mobile communication system. Based on the high-Q values of passive components, MOM capacitor and spiral inductors for L-C band pass filter, a low insertion loss of L-C passive components can be realized with a minimized chip area. The insertion loss was 3 dB for a 1.8 GHz filter, and 5 dB for a 900 MHz filter. This paper also discusses a analysis and practical design to thin-film L-C band pass filter.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.10
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• pp.877-882
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• 2016

In this paper, a novel CMOS high Q factor 2-port active inductor has been proposed. The proposed circuit is designed by cascading basic gyrator-C structural active inductors and attaching the feedback LC resonance circuit. This LC resonator can compensate parasitic capacitance of transistor and can improve Q factor over wide frequency range. The proposed circuit was fabricated and simulated using 65 nm Samsung RF CMOS process. The fabricated circuit shows inductance of above 2 nH and Q factor higher than 40 in the frequency range of 1~6 GHz.

• Journal of the Korean Society of Industry Convergence
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• v.22 no.3
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• pp.373-379
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• 2019

Nowadays, the IoT portable electronic devices have become more useful and diverse, so they require various supply voltage levels to operate. This paper presents a DC-DC buck converter with pulse width modulation (PWM) for portable electronic devices. The proposed step-down DC-DC converter consists of passive elements such as capacitors, inductors, and resistors and an integrated chip (IC) for signal control to reduce power consumption and improves ripple voltage with the resolution. The proposed DC-DC converter is simulated and analyzed in PSPICE circuit design platform, and implemented on the prototype PCB board with a Texas Instruments LM5165 IC. The proposed buck converter is showed 92.6% of peak efficiency including a load current range of 4-10 mA, 3.29 mV of the voltage ripple at 5 V output voltage for the supply voltage 12 V. Measured and Simulated power efficiency are made good agreement with each other.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.7
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• pp.844-847
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• 2012

By using LHTL(Left-Handed Transmission Line) which is a form of a metamaterial and conventional RHTL (Right-Handed Transmission Line), we designed, fabricated and tested a broadband $90^{\circ}$ coupler which is a basic circuit for I-Q vector signal generation. Synthetic LHTL and RHTL were implemented with capacitors and inductors only, that the size is minimized. Also, by implementing a Wilkinson power divider which is required for the suggested circuit using a synthetic RHTL, the size of whole circuit is only $11mm{\times}12mm$. For the frequency range 0.8~1.25 GHz, the phase difference at the outputs maintained $90^{\circ}{\pm}5^{\circ}$ and thus, a broadband $90^{\circ}$ coupler could be made in a compact form. for the same frequency range, the insertion loss is less than 1.6 dB and return loss is more than 10.1 dB. To the best of our knowledge, this is the smallest and broadband $90^{\circ}$ coupler for the frequency range and if the circuit is made with MMIC(Monolithic Microwave Integrated Circuit) technology, the size will be reduced much further.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.2
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• pp.328-338
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• 2017

In this paper, a zero torque control scheme adopting current sharing function (CSF) used in integrated Switched Reluctance Motor (SRM) drive with DC battery charger is proposed. The proposed control scheme is able to achieve the keeping position (KP), zero torque (ZT) and power factor correction (PFC) at the same time with a simple novel current sharing function algorithm. The proposed CSF makes the proper reference for each phase windings of SRM to satisfy the total charging current of the battery with zero torque output to hold still position with power factor correction, and the copper loss minimization during of battery charging is also achieved during this process. Based on these, CSFs can be used without any recalculation of the optimal current at every sampling time. In this proposed integrated battery charger system, the cost effective, volume and weight reduction and power enlargement is realized by function multiplexing of the motor winding and asymmetric SR converter. By using the phase winding as large inductors for charging process, and taking the asymmetric SR converter as an interleaved converter with boost mode operation, the EV can be charged effectively and successfully with minimum integral system. In this integral system, there is a position sliding mode controller used to overcome any uncertainty such as mutual inductance or DC offset current sensor. Power factor correction and voltage adaption are obtained with three-phase buck type converter (or current source rectifier) that is cascaded with conventional SRM, one for wide input and output voltage range. The practicability is validated by the simulation and experimental results by using a laboratory 3-hp SRM setup based on TI TMS320F28335 platform.