• 제목/요약/키워드: Integrated driver

검색결과 238건 처리시간 0.029초

Driving Methods of LCD-TV Using a-Si:H TFT Integrated Gate Drivers

  • Lee, Chang-Soo;Lee, Min-Cheol;Lee, Yong-Soon;Bae, Yu-Han;Kim, Young-Su;Moon, Seung-Hwan;Kim, Nam-Deog;Kim, Sang-Soo
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
    • /
    • pp.280-283
    • /
    • 2008
  • LCD-TV applications were successfully implemented using integrated gate drivers. Integrated gate drivers have been implemented on a HD panel for 60Hz operation and on a FHD panel for 120Hz operation. It is found that the integrated gate driver reduces the flicker of a panel.

  • PDF

BSC와 EVA를 이용한 TDABC 통합시스템의 개발 (Development of Integrated System of Time-Driven Activity-Based Costing(TDABC) Using Balanced Scorecard(BSC) and Economic Value Added(EVA))

  • 최성운
    • 대한안전경영과학회지
    • /
    • 제16권3호
    • /
    • pp.451-469
    • /
    • 2014
  • The purpose of this study is to implement and develop the integrated Economic Value Added (EVA) and Time-Driven Activity-Based Costing (TDABC) model to seek both improvement of Net Operating Profit Less Adjusted Tax (NOPLAT) and reduction of Capital Charge (CC). Net Operating Profit Less Adjusted Tax (NOPLAT) can be maximized by reducing the indirect cost of an unused resource capacity increased by Cost Capacity Ratio (CCR) of TDABC. On the other hand, Capital Charge (CC) can be minimized by improving the efficiency of Invested Capital (IC) considered by Weighted Average Cost of Capital (WACC) of EVA. In addition, the integrated system of TDABC using Balance Scorecard (BSC) and EVA is developed by linking between the lagging indicators and the three leading indicators. The three leading indicators include customer, internal process and growth and learning perspectives whereas the lagging indicator includes NOPLAT and CC in terms of financial perspective. When the Critical Success Factor (CSF) of BSC is cascading as a cause and an effect relationship, time driver of TDABC and capital driver of EVA can be used efficiently as Key Performance Indicator (KPI) of BSC. For a better understanding of the proposed EVA/TDABC model and BSC/EVA/TDABC model, numerical examples are derived from this paper. From the proposed model, the time driver of TDABC and the capital driver of EVA are known to lessen indirect cost from comprehensive income statement when increasing the efficiency of operating IC from the statement of financial position with unified KPI cascading of aligned BSC CSFs.

유기 박막 트랜지스터를 이용한 유연한 디스플레이의 게이트 드라이버용 로직 게이트 구현 (Implementation of Logic Gates Using Organic Thin Film Transistor for Gate Driver of Flexible Organic Light-Emitting Diode Displays)

  • 조승일;미즈카미 마코토
    • 한국전자통신학회논문지
    • /
    • 제14권1호
    • /
    • pp.87-96
    • /
    • 2019
  • 유기 박막 트랜지스터 (OTFT) 백플레인을 이용한 유연한 유기 발광 다이오드 (OLED) 디스플레이가 연구되고 있다. OLED 디스플레이의 구동을 위해서 게이트 드라이버가 필요하다. 저온, 저비용 및 대 면적 인쇄 프로세스를 사용하는 디스플레이 패널의 내장형 게이트 드라이버는 제조비용을 줄이고 모듈 구조를 단순화한다. 이 논문에서는 유연한 OLED 디스플레이 패널의 내장형 게이트 드라이버 제작을 위하여 OTFT를 사용한 의사 CMOS (pseudo complementary metal oxide semiconductor) 로직 게이트를 구현한다. 잉크젯 인쇄형 OTFT 및 디스플레이와 동일한 프로세스를 사용하여 유연한 플라스틱 기판 상에 의사 CMOS 로직 게이트가 설계 및 제작되며, 논리 게이트의 동작은 측정 실험에 의해 확인된다. 최대 1 kHz의 입력 신호 주파수에서 의사 CMOS 인버터의 동작 결과를 통하여 내장형 게이트 드라이버의 구현 가능성을 확인하였다.

a-Si TFT Integrated Gate Driver Using Multi-thread Driving

  • Jang, Yong-Ho;Yoon, Soo-Young;Park, Kwon-Shik;Kim, Hae-Yeol;Kim, Binn;Chun, Min-Doo;Cho, Hyung-Nyuck;Choi, Seung-Chan;Moon, Tae-Woong;Ryoo, Chang-Il;Cho, Nam-Wook;Jo, Sung-Hak;Kim, Chang-Dong;Chung, In-Jae
    • Journal of Information Display
    • /
    • 제7권3호
    • /
    • pp.5-8
    • /
    • 2006
  • A novel a-Si TFT integrated gate driver circuit using multi-thread driving has been developed. The circuit consists of two independent shift registers alternating between the two modes, "wake" and "sleep". The degradation of the circuit is retarded because the bias stress is removed during the sleep mode. It has been successfully integrated in 14.1-in. XGA LCD Panel, showing enhanced stability.

통합DB를 활용한 청년운전자의 위험도 실증분석 (Empirical Study on the Risk Analysis of Young Driver Utilizing Integrated Data Base(DB))

  • 김태호;이수일;최병호
    • 한국안전학회지
    • /
    • 제27권5호
    • /
    • pp.203-210
    • /
    • 2012
  • Traffic accident risk of young drivers(less than 25) is reported to have 8 times as high as that of middle aged drivers(between 30 and 49). Despite the rise of traffic accident risk, few have been attempted to take a look into driving characteristics of young drivers. The purpose of this paper is to analyze age-specific risks of young driver by means of database of insurance and vehicle inspection, thereby collecting data such as age, vehicle mileage, injuries and so on. We conducted Data-Mining(CART) and Portfolio analysis according to age groups(every 10 years). The conclusions which can be drawn from this empirical study are as follows: (1) Despite the fact that young drivers have low vehicle mileage, the rate of fatality is relatively high. (2) Being concerned of vehicle mileage, 24,000km of driving experience is thought to be critical in differing in fatality rate. Having annual average mileage fewer than 24,169 km, accident frequency is relatively lower than that exceeding 24,169 km(1,571 cases). Backed upon these, some recommendations about driver's license system for young driver to improve are given.

운전자-자동차모델을 이용한 4륜조향자동차의 주행특성 해석 (Dynamic Characteristics Analysis of a Four-Wheel Steering Vehicle Using a Driver-Vehicle Model)

  • 이영화;김석일;서명원;김대영;김동룡
    • 한국자동차공학회논문집
    • /
    • 제3권3호
    • /
    • pp.119-128
    • /
    • 1995
  • A driver-vehicle model means the integrated dynamic model that is able to estimate the steering wheel angle from the driver's desired path based on the dynamic characteristics of the driver and vehicle. In this paper, the dynamic characteristics of several four-wheel steering systems with the simultaneously steerable front and rear wheels are investigated and compared by means of the driver-vehicle model. Especially, the presented analysis results are obtained by using the ISO test codes such as lane change, double lane change and slalom, and the effects of the driver's steering response time and vehicle speed are examined on the responsiveness and stability of vehicle.

  • PDF

25-Gb/s Optical Transmitter with Si Ring Modulator and CMOS Driver

  • Rhim, Jinsoo;Lee, Jeong-Min;Yu, Byung-Min;Ban, Yoojin;Cho, Seong-Ho;Choi, Woo-Young
    • Journal of the Optical Society of Korea
    • /
    • 제18권5호
    • /
    • pp.564-568
    • /
    • 2014
  • We present a 25-Gb/s optical transmitter composed of a Si ring modulator and CMOS driver circuit. The Si ring modulator is realized with 220-nm Si-on-insulator process and the driver circuit with 65-nm CMOS process. The modulator and the driver are hybrid-integrated on the printed circuit board with bonding wires. The driver is designed so that the parasitic bonding wire inductance provides enhanced driver bandwidth. The transmitter successfully demonstrates 25-Gb/s operation.

새로운 게이트 드라이버를 이용한 완전 집적화된 DC-DC 벅 컨버터 (A Fully-Integrated DC-DC Buck Converter Using A New Gate Driver)

  • 안영국;전인호;노정진
    • 대한전자공학회논문지SD
    • /
    • 제49권6호
    • /
    • pp.1-8
    • /
    • 2012
  • 본 논문은 패키징 인덕터를 이용한 완전 집적화된 DC-DC 벅 컨버터를 소개한다. 사용된 패키징 인덕터는 본딩 와이어와 리드 프레임의 기생 인덕턴스를 포함한다. 이들은 실리콘 위에서 구현되는 온-칩 인덕터 보다 높은 Q 인자를 가진다. 또한 본 논문은 고주파 스위칭 컨버터의 효율적인 레귤레이션을 위해 로우-스윙 게이트 드라이버를 제안한다. 로우-스윙 드라이버는 다이오드-커넥티드 트랜지스터의 전압 드롭을 이용한다. 제안된 컨버터는 $0.13-{\mu}m$ CMOS 공정을 통해 설계 및 제작되었다. 제작된 벅 컨버터의 효율은 입출력 전압비가 3.3 V/ 2.0 V와 2.8 V/ 2.3 V 일 때, 각각 68.7%, 86.6%로 측정되었다.

The Development of a 20MW PWM Driver for Advanced Fifteen-Phase Propulsion Induction Motors

  • Sun, Chi;Ai, Sheng;Hu, Liangdeng;Chen, Yulin
    • Journal of Power Electronics
    • /
    • 제15권1호
    • /
    • pp.146-159
    • /
    • 2015
  • Since the power capacity needed for the propulsion of large ships is very large, a multiphase AC induction propulsion mode is generally adopted to meet the higher requirements of reliability, redundancy and maintainability. This paper gives a detailed description of the development of a 20MW fifteen-phase PWM driver for advanced fifteen-phase propulsion induction motors with a special third-harmonic injection in terms of the main circuit hardware, control system design, experiments, etc. The adoption of the modular design method for the main circuit hardware design can make the enclosed mechanical structure simple and maintainable. It can also avoid the larger switch stresses caused by the multiple turn on of the IGBTs in conventional large-capacity converter systems. The use of the distributed controller design method based on a high-speed fiber-optic ring net for the control system can overcome such disadvantages as the poor reliability and long maintenance times arising from the conventional centralized controller which is designed according to point-to-point communication. Finally, the performance of the 20MW PWM driver is verified by experimentation on a new fifteen-phase induction propulsion motor.

Ku-Band Power Amplifier MMIC Chipset with On-Chip Active Gate Bias Circuit

  • Noh, Youn-Sub;Chang, Dong-Pil;Yom, In-Bok
    • ETRI Journal
    • /
    • 제31권3호
    • /
    • pp.247-253
    • /
    • 2009
  • We propose a Ku-band driver and high-power amplifier monolithic microwave integrated circuits (MMICs) employing a compensating gate bias circuit using a commercial 0.5 ${\mu}m$ GaAs pHEMT technology. The integrated gate bias circuit provides compensation for the threshold voltage and temperature variations as well as independence of the supply voltage variations. A fabricated two-stage Ku-band driver amplifier MMIC exhibits a typical output power of 30.5 dBm and power-added efficiency (PAE) of 37% over a 13.5 GHz to 15.0 GHz frequency band, while a fabricated three-stage Ku-band high-power amplifier MMIC exhibits a maximum saturated output power of 39.25 dBm (8.4 W) and PAE of 22.7% at 14.5 GHz.

  • PDF