• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.970-973
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• 2003

Abstract An idea to redce the direct-path short circuit current of the CMOS digital integrated circuit is present. The sample circuit model of the CMOS digital circuit is the CMOS current-control digital output driver circuit, which are also suitable for the low voltage supply integrated circuits as the simple digital inverter, are present in this title. The circuit consists of active MOS load as the current control source, which construct from the saturated n-channel and p-channel MOSFET and the general CMOS inverter circuits. The saturated MOSFET bias can control the output current and the frequency response of the circuit. The experimental results show that lower short circuit current control can make the lower frequency response of the circuit.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.1027-1029
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• 2004

In this paper, we have fabricated pentacene thin film transistors (TFTs) using polyvinylphenol (PVP) copolymer and cross-linked PVP as gate insulator on glass and plastic (PET) substrate. Depending on the density of PVP and cross-link material the performance has been changed. We obtained the best device performance with the mobility of 0.32cm2/V${\cdot}$sec and the on/off current ratio of 1.19${\times}$106 for the case of 10wt% PVP copolymer mixed with 5wt% poly (melamine-co-formaldehyde). Additionally using pentacene TFTs with the above PVP gate insulator, we fabricated the integrated circuits including inverter which produced the gain of 9.7.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.2
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• pp.74-79
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• 2003

The method of the analysis of the base Gummel number of the BJT(Bipolar Junction Transistor) for integrated circuits based upon the semiconductor physics is proposed and the method of calculating the doping profile of the base region using process conditions is presented. The transistor saturation current obtained from the proposed method of NPN BJT using 20V and 30V process shows an averaged relative error of 6.7% compared with the measured data and the transistor saturation current of PNP BJT shows an averaged relative error of 9.2% compared with the measured data

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.2
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• pp.67-73
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• 2003

The algorithm (or calculating the base-collector breakdown voltage of NPN BJT(Bipolar Junction Transistor) for integrated circuits is Proposed. The method for calculating the electric field using the solution of Poisson's equation is presented and the method for calculating the breakdown voltage using the integration of ionization coefficients is presented. The base-collector breakdown voltage of NPN BJT using 20V process obtained from the proposed method shows an averaged relative error of 8.0% compared with the measured data and the base-collector breakdown voltage of NPN BJT using 30V process shows an averaged relative error of 4.3% compared with the measured data

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.8
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• pp.49-63
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• 1997

This paper presents a current sensor that detects defects in CMOS integrated circuits using the current testing technique. The current sensor is built in a CMOS integrated circuit to test an abnormal current. The proposed circuit has a very small impact on the performance of the circuit under test during the normal mode. In the testing mode, the proposed circuit detects the abnormal current caused by permanent manufacturing defects and determines whether the circuit under test is defect-free or not. The proposed current sensor is simple and requires no external voltage and current sources. Hence, the circuit has less area and performance degradation, and is more efficient than any previous works. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1995.10a
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• pp.64-67
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• 1995

Transfer Molding is currently the most widely used process for encapsulation integrated circuits(;IC). Although the process has been introduced over 20 years ago, generating billions of parts each year, it is far from being optimized. With each new mold, epoxy mold, epoxy mold compound, and lead-frame, lengthy period and expensive qualification runs have to be performed to minimized defects ranging from wire sweep, incomplete fill, and internal voids etc. This studies describes how simulation can be applied to transfer molding to yield acceptable design and processing parameter. The non-isothermal filling of non-newtonian reactive epoxy molding compound(;EMC) in a multi-cavity mold is analyzed. Sensitivity analysis is conducted to investigate the influence of process deviations on the final molded profile. This study trend is carried out by following some heuristic process guidelines.

• Electrical & Electronic Materials
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• v.10 no.8
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• pp.783-793
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• 1997

A VLSI implementation of a self-learning neural network integrated circuits using a linearity synapse transistor is investigated. The thickness dependence of oxide current density stress current transient current and channel current has been measured in oxides with thicknesses between 41 and 112 $\AA$, which have the channel width $\times$ length 10 $\times$1${\mu}{\textrm}{m}$, 10 $\times$ 0.3${\mu}{\textrm}{m}$ respectively. The transient current will affect data retention in synapse transistors and the stress current is used to estimate to fundamental limitations on oxide thicknesses. The synapse transistor has represented the neural states and the manipulation which gaves unipolar weights. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhitory state according to weighted values affected the drain source current.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.29-29
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• 2008

Realization of electronics with performance equal to established technologies that use rigid semiconductor wafers, but in lightweight, foldable and stretchable formats would enable many new application possibilities. Examples include wearable systems for personal health monitoring, 'smart' surgical gloves with integrated electronics and electronic eye type imagers that incorporate focal plane arrays on hemispherical substrates. Circuits that use organic or certain classes of inorganic electronic materials on plastic or steel foil substrates can provide some degree of mechanical flexibility, but they cannot be folded or stretched. Also, with few exceptions such systems offer only modest electrical performance. In this talk, I will present a new approach to high performance, flexible and stretchable integrated circuits. These systems combine single-crystal silicon nanoribbons with thin plastic or elastomeric substrates using both "top-down" and "transfer-printing" technologies. The strategies represent promising routes to high performance, flexible and stretchable optoelectronic devices that can incorporate established, high performance inorganic electronic materials.

• Journal of Information Display
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• v.3 no.3
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• pp.35-43
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• 2002

Silicon-based 0.69-inch AMOEL microdisplay with integrated driver and timing controller circuits for microdisplay applications has been developed using 0.35 ${\mu}m$ l-poly 4-metal standard CMOS process with 5 V CMOS devices and CMP (Chemical Mechanical Polishing) technology. To reduce the large data programming time consumed in a conventional current programming pixel circuit technique and to achieve uniform display, de-amplifying current mirror pixel circuit and the current-mode data driver circuit with threshold roltage compensation are proposed. The proposed current-mode data driver circuit is inherently immune to the ground-bouncing effect. The Monte-Carlo simulation results show that the proposed current-mode data driver circuit has channel-to-channel non-uniformity of less than ${\pm}$0.6 LSB under ${\pm}$70 mV threshold voltage variaions for both NMOS and PMOS transistors, which gives very good display uniformity.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.12
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• pp.1663-1668
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• 1988

Ohmic contact process for the fabrication of GaAs integrated circuits is very important. Specific contact resistivities, assuming Rsm=Rs, were measured after the rapid and the conventional alloying process, respectively. The results show that the characteristics of ohmic contact through the rapid alloying process is much better (Apc=1.3~3.3x10**-7 \ulcorner-(m\ulcorner. This is probably due to intensive and compound energy densities during the rapid alloying process. New analysis method of TLM patterns viz. measurements of normlaized specific contact resistivities are proposed to reduce measurement errors that could occur when measuring the small contact end resistances. The adoption of rapid alloying process for the mass production of GaAs integrated circuits could greatly reduce the total processig time.