• Journal of Magnetics
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• 제14권1호
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• pp.23-26
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• 2009

Spin injection from a ferromagnet into an n-doped $In_{0.53}Ga_{0.47}As$ channel was electrically detected by a ferromagnetic detector. At T = 20 K, using non-local and local spin-valve measurements, a non-local signal of $2\;{\mu}V$ and a local spin valve signal of 0.041% were observed when the bias current was 1 mA. The band calculation and Shubnikov-de Haas oscillation measurement in a bulk channel showed that the gate controlled spin-orbit interaction was not large enough to control the spin precession but it could be a worthy candidate for a logic device using spin accumulation and diffusion.

• Journal of Electrical Engineering and Technology
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• 제10권3호
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• pp.1131-1137
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• 2015

Gallium nitride (GaN) is a promising material for next-generation high-power applications due to its wide bandgap, high breakdown field, high electron mobility, and good thermal conductivity. From a structure point of view, the vertical device is more suitable to high-power applications than planar devices because of its area effectiveness. However, it is challenging to obtain a completely upright vertical structure due to inevitable sidewall slope in anisotropic etching of GaN. In this letter, we design and analyze the enhancement-mode n-channel vertical GaN MOSFET with variation of sidewall gate angle by two-dimensional (2D) technology computer-aided design (TCAD) simulations. As the sidewall slope gets closer to right angle, the device performances are improved since a gradual slope provides a leakage current path through the bulk region.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권4호
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• pp.342-354
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• 2013

The aim of this work is to investigate and study the quantum effects in the modeling of nanoscale symmetric double-gate InAlAs/InGaAs/InP HEMT (High Electron Mobility Transistor). In order to do so, the carrier concentration in InGaAs channel at gate lengths ($L_g$) 100 nm and 50 nm, are modelled by a density gradient model or quantum moments model. The simulated results obtained from the quantum moments model are compared with the available experimental results to show the accuracy and also with a semi-classical model to show the need for quantum modeling. Quantum modeling shows major variation in electron concentration profiles and affects the device characteristics. The two triangular quantum wells predicted by the semi-classical model seem to vanish in the quantum model as bulk inversion takes place. The quantum effects thus become essential to incorporate in nanoscale heterostructure device modeling.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.160-160
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• 2015

InGaZnO (IGZO) thin-film transistors (TFTs) are very promising due to their potential use in high performance display backplane [1]. However, the stability of IGZO TFTs under the various stresses has been issued for the practical IGZO applications [2]. Up to now, many researchers have studied to understand the sub-gap density of states (DOS) as the root cause of instability [3]. Nomura et al. reported that these deep defects are located in the surface layer of the IGZO channel [4]. Also, Kim et al. reported that the interfacial traps can be affected by different RF-power during RF magnetron sputtering process [5]. It is well known that these trap states can influence on the performances and stabilities of IGZO TFTs. Nevertheless, it has not been reported how these defect states are created during conventional RF magnetron sputtering. In general, during conventional RF magnetron sputtering process, negative oxygen ions (NOI) can be generated by electron attachment in oxygen atom near target surface and accelerated up to few hundreds eV by self-bias of RF magnetron sputter; the high energy bombardment of NOIs generates bulk defects in oxide thin films [6-10] and can change the defect states of IGZO thin film. In this study, we have confirmed that the NOIs accelerated by the self-bias were one of the dominant causes of instability in IGZO TFTs when the channel layer was deposited by conventional RF magnetron sputtering system. Finally, we will introduce our novel technology named as Magnetic Field Shielded Sputtering (MFSS) process [9-10] to eliminate the NOI bombardment effects and present how much to be improved the instability of IGZO TFTs by this new deposition method.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.466-468
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• 2012

Amorphous InGaZnO (${\alpha}$-IGZO) thin-film transistors (TFTs) are are very promising due to their potential use in thin film electronics and display drivers [1]. However, the stability of AOS-TFTs under the various stresses has been issued for the practical AOSs applications [2]. Up to now, many researchers have studied to understand the sub-gap density of states (DOS) as the root cause of instability [3]. Nomura et al. reported that these deep defects are located in the surface layer of the ${\alpha}$-IGZO channel [4]. Also, Kim et al. reported that the interfacial traps can be affected by different RF-power during RF magnetron sputtering process [5]. It is well known that these trap states can influence on the performances and stabilities of ${\alpha}$-IGZO TFTs. Nevertheless, it has not been reported how these defect states are created during conventional RF magnetron sputtering. In general, during conventional RF magnetron sputtering process, negative oxygen ions (NOI) can be generated by electron attachment in oxygen atom near target surface and accelerated up to few hundreds eV by self-bias of RF magnetron sputter; the high energy bombardment of NOIs generates bulk defects in oxide thin films [6-10] and can change the defect states of ${\alpha}$-IGZO thin film. In this paper, we have confirmed that the NOIs accelerated by the self-bias were one of the dominant causes of instability in ${\alpha}$-IGZO TFTs when the channel layer was deposited by conventional RF magnetron sputtering system. Finally, we will introduce our novel technology named as Magnetic Field Shielded Sputtering (MFSS) process [9-10] to eliminate the NOI bombardment effects and present how much to be improved the instability of ${\alpha}$-IGZO TFTs by this new deposition method.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.199-199
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• 2011

Recently, Thin film transistors (TFTs) with amorphous oxide semiconductors (AOSs) can offer an important aspect for next generation displays with high mobility. Several oxide semiconductor such as ZnO, $SnO_2$ and InGaZnO have been extensively researched. Especially, as a well-known binary metal oxide, tin oxide ($SnO_2$), usually acts as n-type semiconductor with a wide band gap of 3.6eV. Over the past several decades intensive research activities have been conducted on $SnO_2$ in the bulk, thin film and nanostructure forms due to its interesting electrical properties making it a promising material for applications in solar cells, flat panel displays, and light emitting devices. But, its application to the active channel of TFTs have been limited due to the difficulties in controlling the electron density and n-type of operation with depletion mode. In this study, we fabricated staggered bottom-gate structure $SnO_2$-TFTs and patterned channel layer used a shadow mask. Then we compare to the performance intrinsic $SnO_2$-TFTs and doping hafnium $SnO_2$-TFTs. As a result, we suggest that can be control the defect formation of $SnO_2$-TFTs by doping hafnium. The hafnium element into the $SnO_2$ thin-films maybe acts to control the carrier concentration by suppressing carrier generation via oxygen vacancy formation. Furthermore, it can be also control the mobility. And bias stability of $SnO_2$-TFTs is improvement using doping hafnium. Enhancement of device stability was attributed to the reduced defect in channel layer or interface. In order to verify this effect, we employed to measure activation energy that can be explained by the thermal activation process of the subthreshold drain current.

• 대한전자공학회논문지SD
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• 제45권7호
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• pp.37-43
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• 2008

본 논문에서는 전하 펌프 방법 (Charge Pumping Method, CPM)를 이용하여 서로 다른 질화막 층을 가지는 N-Channel SANOS (Silicon-$Al_2O_3$-Nitride-Oxide-Silicon) Flash Memory Cell 트랜지스터의 트랩 특성을 규명하였다. SANOS Flash Memory에서 계면 및 질화막 트랩의 중요성은 널리 알려져 있지만 소자에 직접 적용 가능하면서 정화하고 용이한 트랩 분석 방법은 미흡하다고 할 수 있다. 기존에 알려진 분석 방법 중 전하 펌프 방법은 측정 및 분석이 간단하면서 트랜지스터에 직접 적용이 가능하여 MOSFET에 널리 사용되어왔으며 최근에는 MONOS/SONOS 구조에도 적용되고 있지만 아직까지는 Silicon 기판과 tunneling oxide와의 계면에 존재하는 트랩 및 tunneling oxide가 얇은 구조에서의 질화막 벌크 트랩 추출 결과만이 보고되어 있다. 이에 본 연구에서는 Trapping Layer (질화막)가 다른 SONOS 트랜지스터에 전하 펌프 방법을 적용하여 Si 기판/Tunneling Oxide 계면 트랩 및 질화막 트랩을 분리하여 평가하였으며 추출된 결과의 정확성 및 유용성을 확인하고자 트랜지스터의 전기적 특성 및 메모리 특성과의 상관 관계를 분석하고 Simulation을 통해 확인하였다. 분석 결과 계면 트랩의 경우 트랩 밀도가 높고 trap의 capture cross section이 큰 소자의 경우 전자이동도, subthreshold slop, leakage current 등의 트랜지스터의 일반적인 특성 열화가 나타났다. 계면 트랩은 특히 Memory 특성 중 Program/Erase (P/E) speed에 영향을 미치는 것으로 나타났는데 이는 계면결함이 많은 소자의 경우 같은 P/E 조건에서 더 많은 전하가 계면결함에 포획됨으로써 trapping layer로의 carrier 이동이 억제되기 때문으로 판단되며 simulation을 통해서도 동일한 결과를 확인하였다. 하지만 data retention의 경우 계면 트랩보다 charge trapping layer인 질화막 트랩 특성에 의해 더 크게 영향을 받는 것으로 나타났다. 이는 P/E cycling 횟수에 따른 data retention 특성 열화 측정 결과에서도 일관되게 확인할 수 있었다.