• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.13-16
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• 2000

A quantum-wire field effect transistor(QW-FET) using asymmetric double InGaAs channel and Si-delta doped barrier has been fabricated. It exhibited good modulation and saturation characteristic in the range of ${\mu}\textrm{A}$ current level. For estimated channel width of 150nm QW-FET, maximum transconductance was about 400 mS/mm which is higher than a conventional heterostructure FET(HFET) with the same epi-structure.

• 전자공학회논문지A
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• 제28A권1호
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• pp.30-39
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• 1991

The influence of physical parameters (Al mole fraction, thickness, doping concentration) in the window and emitter on the efficiency characteristics of heteroface p-$Al_{x}Ga_{1-x}As/p-GaAs/n-GaAs/n^{+}$-GaAs solar cell is investigated. The maximum efficiency theoretically calculated in this device is obtained when a thickness of the window is in a range of (400-1000))$\AA$and a thickness/doping concentration of the emitter is in a range of (0.5-0.8)$\mu$m/(1-7)${\times}10^{17}cm^{-3}$, respectively. Also is the efficiency improved according to the increase of Al mole fraction in the indirect gap window(0.41${\le}x{\le}1.0$). The optimum designed heteroface cell with an area of 0.165cm$^2$fabricated using MOCVD exhibits an active area conversion efficiency of 17%, having a short circuit current density of 21.2mA/cm\ulcorner an open circuit voltage of 0.94V, and a fill factor of 0.75 under ELH-100mW/cm$^2$illumination.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1994년도 추계 학술발표 강연 및 논문 개요집
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• pp.16-17
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• 1994

• Journal of the Optical Society of Korea
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• 제17권1호
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• pp.16-21
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• 2013

In this paper, we report the effect of GaN/graded-composition AlGaInN/GaN quantum barriers in active regions on the electrical and optical properties of GaN-based vertical light emitting diodes (VLEDs). By modifying the aluminum composition profile within the AlGaInN quantum barrier, we have achieved improvements in the output power and the internal quantum efficiency (IQE) as compared to VLEDs using conventional GaN barriers. The forward voltages at 350 mA were calculated to be 3.5 and 4.0 V for VLEDs with GaN/graded-composition AlGaInN/GaN barriers and GaN barriers, respectively. The light-output power and IQE of VLEDs with GaN/graded-composition AlGaInN/GaN barriers were also increased by 4.3% and 9.51%, respectively, as compared to those with GaN barriers.

• 한국정보통신학회논문지
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• 제3권3호
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• pp.681-686
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• 1999

본 논문에서는 편광 비의존 특성을 가지는 반도체 광 증폭기 개발을 위해 지금까지와는 다른 새로운 방법인 160($\AA$) 두께를 가지는 GaInAs 양자 우물에 GaAs Delta 층을 각각 1층, 2층, 3층을 삽입한 구조와 GaAs Delta 3층의 구조에서 Delta 층의 두께를 1 원자층에서 3 원자층까지 변화시켜 계산한 결과, 1 원자층 두께를 가지는 GaAs Delta 층이 3층 포함된 구조에서 3dB 이득 대역폭이 TE, TM 모두 85nm로 매우 넓은 대역폭과 편광 비의존 특성을 함께 가지는 구조를 얻어낼 수 있었다. 이러한 GaInAs 양자 우물에 GaAs Delta 층을 삽입한 구조의 이론적 이득 특성의 결과는 반도체 광 증폭기의 설계에 있어서 아주 중요하며, 또한 광대역 과장 분할 다중화 시스템에 적용될 수 있는 반도체 광 증폭기에 알맞은 구조로 사용될 수 있다.

• Applied Science and Convergence Technology
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• 제27권3호
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• pp.56-60
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• 2018

The optical properties of the digital-alloy $(In_{0.53}Ga_{0.47}As)_{1-z}/(In_{0.52}Al_{0.48}As)_z$ grown by molecular beam epitaxy as a function of composition z (z = 0.4, 0.6, and 0.8) have been studied using temperature-dependent photoluminescence (PL) and time-resolved PL (TRPL) spectroscopy. As the composition z increases from 0.4 to 0.8, the PL peak energy of the digital-alloy $In(Ga_{1-z}Al_z)As$ is blueshifted, which is explained by the enhanced quantization energy due to the reduced well width. The decrease in the PL intensity and the broaden FWHM with increasing z are interpreted as being due to the increased Al contents in the digital-alloy $In(Ga_{1-z}Al_z)As$ because of the intermixing of Ga and Al in interface of InGaAs well and InAlAs barrier. The PL decay time at 10 K decreases with increasing z, which can be explained by the easier carrier escape from InGaAs wells due to the enhanced quantized energies because of the decreased InGaAs well width as z increases. The emission energy and luminescence properties of the digitalalloy $(InGaAs)_{1-z}/(InAlAs)_z$ can be controlled by adjusting composition z.

• 한국재료학회지
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• 제13권10호
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• pp.635-639
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• 2003

We investigated dry etching of GaAs and AiGaAs in a high density planar inductively coupled plasma system with BCl$_3$and BCl$_3$/Ar gas chemistry. A detailed etch process study of GaAs and ALGaAs was peformed as functions of ICP source power, RIE chuck power and mixing ratio of $BCl_3$ and Ar. Chamber process pressure was fixed at 7.5 mTorr in this study. The ICP source power and RIE chuck power were varied from 0 to 500 W and from 0 to 150 W, respectively. GaAs etch rate increased with the increase of ICP source power and RIE chuck power. It was also found that etch rates of GaAs in $15BCi_3$/5Ar plasmas were relatively high with applied RIE chuck power compared to pure 20 sccm $BCl_3$plasmas. The result was the same as AlGaAs. We expect that high ion-assisted effect in $BCl_3$/Ar plasma increased etch rates of both materials. The GaAs and AlGaAs features etched at 20 sccm $BCl_3$and $15BCl_3$/5Ar with 300 W ICP source power, 100 W RIE chuck power and 7.5 mTorr showed very smooth surfaces(RMS roughness < 2 nm) and excellent sidewall. XPS study on the surfaces of processed GaAs also proved extremely clean surfaces of the materials after dry etching.

• 한국재료학회지
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• 제9권5호
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• pp.460-466
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• 1999

The deep level electron traps in AP-MOCVD GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures have been investigated by means of Deep Level Transient Spectroscopy DLTS). In terms of the experimental procedure, GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures were deposited on 2" undoped semi-insulating GaAs wafers by the AP-MOCVD method at $650^{\circ}C$ with TMGa, AsH3, TMAl, and SiH4 gases. The n-type GaAs conduction layers were doped with Si to the target concentration of about 2$\times$10\ulcornercm\ulcorner. The Al content was targeted to x=0.5 and the thicknesses of Al\ulcornerGa\ulcornerAs layers were targeted from 0 to 40 nm. In order to investigate the electrical characteristics, an array of Schottky diodes was built on the heterostructures by the lift-off process and Al thermal evaporation. Among the key results of this experiment, the deep level electron traps at 0.742~0.777 eV and 0.359~0.680 eV were observed in the heterostructures; however, only a 0.787 eV level was detected in n-type GaAs samples without the Al\ulcornerGa\ulcornerAs overlayer. It may be concluded that the 0.787 eV level is an EL2 level and that the 0.742~0.777 eV levels are related to EL2 and residual oxygen impurities which are usually found in MOCVD GaAs and Al\ulcornerGa\ulcornerAs materials grown at $630~660^{\circ}C$. The 0.359~0.680 eV levels may be due to the defects related with the al-O complex and residual Si impurities which are also usually known to exist in the MOCVD materials. Particularly, as the Si doping concentration in the n-type GaAs layer increased, the electron trap concentrations in the heterostructure materials and the magnitude of the C-V hysteresis in the Schottky diodes also increased, indicating that all are intimately related.ated.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.158-158
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• 2010

본 연구에서는 분자선 박막성장 장비를 (MBE) 이용하여 droplet epitaxy 방법으로 성장시킨 GaAs/AlGaAs 양자점구조의 표면전기장변화에 관하여 photoreflectance spectroscopy (PR)를 이용하였다. 본 실험에 사용된 GaAs/AlGaAs 양자점 구조는 undoped-GaAs (001) 기판을 위에 성장온도 $580^{\circ}C$에서 GaAs buffer layer를 100 nm 성장 후 장벽층으로 AlGaAs을 100 nm 성장하였다. AlGaAs 장벽층을 성장한 후 기판온도를 $300^{\circ}C$로 설정하여 Ga을 3.75 원자층를 (ML) 조사하여 Ga drop을 형성하였다. Ga drop을 GaAs 나노구조로 결정화시키기 위하여 $As_4$를 beam equivalent pressure (BEP) 기준으로 $1{\times}10^{-4}$ Torr로 기판온도 $150^{\circ}C$에서 조사하였다. 결정화 직후 RHEED로 육각구조의 회절 페턴을 관측하여 결정화를 확인하였다. GaAs 나노 구조를 성장한 후 AlGaAs 장벽층을 성장하기위해 10 nm AlGaAs layer는 MEE 방법을 이용하여 $150^{\circ}C$에서 저온 성장 하였으며, 저온성장 후 기판온도를 $580^{\circ}C$로 설정하여 80 nm의 AlGaAs 층을 성장하고 최종적으로 GaAs 10 nm를 capping layer로 성장하였다. 저온성장 과정에서의 결정성의 저하를 보상하기위하여 MBE 챔버내에서 $650^{\circ}C$에서 열처리를 수행하였다. GaAs/AlGaAs 양자점의 광학적 특성은 photoluminescence를 이용하여 평가 하였으며 780 nm 근처에서 발광을 보여 주었다. 특히 PR 실험으로부터 시료의 전기장에 의한 Franz-Keldysh oscillation (FKO)의 변화를 관측하여 GaAs/AlGaAs 양자점의 존재에 의한 시료의 표면에 형성되는 표면전기장을 측정하였다. 또한 시료에 형성된 전기장의 세기를 계산하기위해 PR 신호로부터 fast Fourier transformation (FFT)을 이용하였다. 특히 온도의 존성실험을 통하여 표면전기장의 변화를 관측 하였으며 양자구속효과와 관련성에 대하여 고찰 하였다.

• 한국컴퓨터정보학회논문지
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• 제5권4호
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• pp.102-105
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• 2000

외부 베이스 표면에 형성되는 표면 재결합 상태의 불안정성을 개선하기 위해 에미터 ledge 구조로 제작된 InGaP/GaAs HBT의 신뢰도 측정을 위해 고온에서 오랜 시간동안 정전류 스트레스를 인가하였다. 553K, 533K, 513K에서 콜렉터 전류 24㎃로 스트레스를 인가해 전류이득의 열화를 관찰하였다. 그 결과 EA＝1.97eV, WTTF＝4.8$\times$108시간(14$0^{\circ}C$)을 구하였다. InGaP/GaAs HBT의 열화 원인은 베이스 도펀트인 C의 확산으로 추정된다.