• Journal of the Korean Society of Systems Engineering
• /
• v.8 no.2
• /
• pp.1-10
• /
• 2012

This paper aims to analyze the result of SE Process Implementation on Light Rail Transit(LRT) Project. Currently the Light Rail Transit Project of Korea applies SE to the intermediate phase, that is, E&M phase which is a manufacturing and designing procedure. More seriously, the application effect of SE is not remarkable because it applies to some specific engineering fields like RAMS and it depends on superficial consulting of foreign companies with low SE support capability and investment capital. This study points out that the "Requirement Analysis" and "System Alternative Review" has not been conducted from the initial phase (basic plan and basic design) of the LRT projects. Several projects indicate that the amount of investments for SE activities through the Korea LRT project is relatively very small in comparison with the global capital which is about 10% of total project budget. Furthermore, Korea LRT projects have very few SE professionals and weak SE organization with no government directions and guide book for the efficient implementation of SE for the LRT projects.

• Proceedings of the KIPE Conference
• /
• 2001.10a
• /
• pp.126-131
• /
• 2001

This paper deals with implementation of inverter systems for DC power regeneration, which can regenerate the excessive DC power from DC bus line to AC supply in substations for traction systems. From the viewpoint of both power capacity and switching losses, a three-phase square-wave inverter system is adopted. To control the regenerated power, the magnitude and phase of fundamental output voltages should be appropriately controlled in spite of the variation of input DC voltage. Inverters are operated with modified a-conduction mode to fix the potential of each arm. The overall system consists of the line-to-line voltage and line current sensors, an actual power calculator using d-q transformation method, a complex power controller with PI control scheme, a gating signal generator for modified $\alpha-conduction\;mode\;with\;\delta\;and\;\alpha$, a DPLL for frequency followup, and power circuit.

• Proceedings of the Korea Society for Industrial Systems Conference
• /
• 2007.02a
• /
• pp.97-102
• /
• 2007

Currently, many organizations introduce ERP system as a key enabler of business strategic accomplishment and it can improve productivity and efficiency of organizations by integration and managing enterprise resources. Already many organizations have introduced ERP systems and the number of introduced ERP system is increasing steadily. Unfortunately, even though organizations have invested much money, previous studies showed the ERP systems had not always turned in good result. It is easy to find many studies that suggest that successful implementing strategies for ERP systems. This study reviewed the previous literature on strategic use of change management in enterprise. In order to establish a successful implementation of ERP, this paper suggests proper solutions to conduct change management according to implementation phase with activity and output, especially analyzing successful organizations in implementing ERP system through consistent change management.

• Journal of Electrical Engineering and Technology
• /
• v.3 no.2
• /
• pp.243-253
• /
• 2008

This paper deals with the analysis, design, and implementation of a single phase AC-DC Zeta converter with high frequency transformer isolation and power factor correction(PFC) in two modes of operation, discontinuous current mode of operation(DCM), and continuous current mode of operation(CCM). A Digital Signal Processor(DSP) based implementation is carried out for validation of the Zeta converter developed design in discontinuous mode of operation. A comparison of both modes of operation is presented for a 1kW power rating from the point of view of steady state and dynamic behavior, power quality, simplicity, control technique, device rating, and converter size. The experimental results of a developed prototype of Zeta converter are presented for validation of the developed design. It is observed that CCM is most suitable for higher power applications where it requires some complex control and sensing of the additional variables.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.19 no.1
• /
• pp.148-154
• /
• 2005

This paper deals with performance degradations caused by RF I/Q impairments such as amplitude mismatch and phase mismatch in W-CDMA user equipment which uses QPSK(Quadrature Phase Shift Keying) modulation. The impacts of I/Q impairments on the BER(Bit Error Rate) are analyzed by using the variations of adjacent symbol distance. The BER versus amplitude mismatch and phase mismatch with QPSK constellation is reviewed through Matlab simulation. Performance degradation produced by RF I/Q impairments is measured with the implemented RF transceiver and modulation/demodulation test equipments through EVM(Error Vector Magnitude). The minimum performance requirements of amplitude mismatch and phase mismatch in W-CDMA user equipment are presented from the point of hardware implementation and the test method of the impairments is also included.

• Journal of Power Electronics
• /
• v.17 no.5
• /
• pp.1231-1243
• /
• 2017

Grid-interactive power converters are normally synchronized with the grid using phase-locked loops (PLLs). The performance of the PLLs is affected by the non-ideal conditions in the sensed grid voltage such as harmonics, frequency deviations and the dc offsets in single-phase systems. In this paper, a single-phase PLL is presented to mitigate the effects of these non-idealities. This PLL is based on the popular second order generalized integrator (SOGI) structure. The SOGI structure is modified to eliminate the effects of input dc offsets. The resulting SOGI structure has a high-pass filtering property. Hence, this PLL is termed as a high-pass generalized integrator based PLL (HGI-PLL). It has fixed parameters which reduces the implementation complexity and aids in the implementation in low-end digital controllers. The HGI-PLL is shown to have the lowest resource utilization among the SOGI based PLLs with dc cancelling capability. Systematic design methods are evolved leading to a design that limits the unit vector THD to within 1% for given non-ideal input conditions in terms of frequency deviation and harmonic distortion. The proposed designs achieve the fastest transient response. The performance of this PLL has been verified experimentally. The results agree with the theoretical prediction.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2013.10a
• /
• pp.350-353
• /
• 2013

In this paper, a hardware implementation of phase calculator for extracting 3D depth image from TOF(Time-Of-Flight) sensor is proposed. The designed phase calculator, which adopts redundant binary number systems and a pipelined architecture to improve throughput and speed, performs arctangent operation using vectoring mode of DCORDIC algorithm. Fixed-point MATLAB simulations are carried out to determine the optimized bit-widths and number of iteration. The designed phase calculator is verified by emulating the restoration of virtual 3D data using MATLAB/Simulink and FPGA-in-the-loop verification, and the estimated performance is about 7.5 Gbps at 469 MHz clock frequency.

• 제어로봇시스템학회:학술대회논문집
• /
• 2003.10a
• /
• pp.965-969
• /
• 2003

In this paper, the implementation technique of digital crossover network using perfect linear phase IIR filters is presented. This system has various advantages which cannot be obtained from analog crossover network such as linear phase response, flat group delay and sharp cut-off at low-order over audio frequency band. The simulation results show that the group delay response is maximally flat and twice more attenuation in stop-band than the prototype elliptic IIR filter at all desired frequency.

• Proceedings of the KIEE Conference
• /
• 1997.07f
• /
• pp.2149-2151
• /
• 1997

Open loop microstepping control of two phase hybrid step motors provides enhanced step resolution, smoothness of operation, and removes most of the objectionable resonance phenomena. In this paper, we discuss the technigues about design and implementation of microstepping driver of two phase hybrid step motors.

• Journal of Electrical Engineering and Technology
• /
• v.10 no.4
• /
• pp.1682-1691
• /
• 2015

In this paper, a real time implementation of selective harmonic elimination pulse width modulation (SHEPWM) using Real Coded Genetic Algorithm (RGA), Particle Swarm Optimization technique (PSO) and a new technique known as Linearization Method (LM) for Single Phase Matrix Converter (SPMC) is designed and discussed. In the proposed technique, the switching frequency is fixed and the optimum switching angles are obtained using simple mathematical calculations. A MATLAB simulation was carried out, and FFT analysis of the simulated output voltage waveform confirms the effectiveness of the proposed method. An experimental setup was also developed, and the switching angles and firing pulses are generated using Field Programmable Gate Array (FPGA) processor. The proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real time applications.