• Title/Summary/Keyword: IP Video

Search Result 374, Processing Time 0.028 seconds

Implementation of RTP/RTCP for Teleconferencing System and Analysis of Quality-of-Service using Audio Data Transmission (영상회의 시스템을 위한 RTP/RTCP 구현 및 오디오 데이터 전송을 위용한 QoS 분석)

  • Kang, Min-Gyu;Hwang, Seung-Koo;Kim, Dong-Kyoo
    • The Transactions of the Korea Information Processing Society
    • /
    • v.5 no.12
    • /
    • pp.3047-3062
    • /
    • 1998
  • This paper deseribes the desihn and the implementation of the Realtime Transport Protocol(RTP)/ Rdaltime Control Protocol(RTCP) (RFC 1889,1890) that is used to transmit the audio/video data to any destination and to feedback the Quality of Service (QoS) information of the received media data to the sender, in the teleconferencing systems proposed by ITU-T. These protocols are implemented with multi thead technique and run on top of UDP/IP-Multicast through the socket interface as the underlying protocol. The upper layer is impelmented such that in can be accessed by the H245 comference control protocol. The RTP packetizes the digitized audio/video data from the encoder info a fixed format, and multieast to the participants. The RTCP monitors RTP packets and extracts the QoS values from it such as round-trip delay, jiter and packet loss to form RTCP packets and non periokically sends them to the sender site. In this Paper, we also descritx the study of measurement and analysis for QoS factors that observed on performing teleconferencing system over Internet. The results from this experiment is indicate that RTT and Jitter value are acceptable even entwork load is high. However, it appears that packet loss rate is high in daytime and most losses periods have length one or two.

  • PDF

Implement for EzPlay and PC-EPG of Multimedia Remote Control System (EzPlay/EPG를 적용한 멀티미디어 원격제어 시스템 구현)

  • Park Nho-Kyung;Jin Hun-Jun;Kim Sang-Pok;Park Sang-Bong
    • Journal of the Institute of Electronics Engineers of Korea CI
    • /
    • v.42 no.2 s.302
    • /
    • pp.39-48
    • /
    • 2005
  • In this paper, we implement the multimedia remote control system by using existing internet service or wired online. We also provide user-friendly convenient environment with developed application program named EzPlay and PC-EPG. The multimedia remote control system consists of integrated wireless transceiver of PC and TV connected USB type and the users can easily use lots of contents because EzPlay program provides appropriate UI mode on the PC and TV screen. The unposed system can operate real-time playing, reserved video receding and data storing function using internet mesh based on signal detecting control theory. The PC-EPG system is implemented by server/client web program and the client program based on visual C++/MFC processes data storing in client computer through TCP/IP. It also provides intelligent function that constructs database according to user's preference.

Development of a High-Performance Vehicle Imaging Information System for an Efficient Vehicle Imaging Stabilization (효율적인 차량 영상 안정화를 위한 고성능 차량 영상 정보 시스템 개발)

  • Hong, Sung-Il;Lin, Chi-Ho
    • The Journal of The Korea Institute of Intelligent Transport Systems
    • /
    • v.12 no.6
    • /
    • pp.78-86
    • /
    • 2013
  • In this paper, we propose design of a high-performance vehicle imaging information system for an efficient vehicle imaging stabilization. The proposed system was designed the algorithm by divided as motion estimation and motion compensation. The motion estimation were configured as local motion vector estimation and irregular local motion vector detection, global motion vector estimation. The motion compensation was corrected for the four directions for compensate to the shake of vehicle video image using estimate GMV. The designed algorithm were designed the motion compensation technology chip by applied to IP for vehicle imaging stabilization. In this paper, the experimental results of the proposed vehicle imaging information system were proved to the effectiveness by compared with other methods, because imaging stabilization of moving vehicle was not used of memory by processing real-time. Also, it could be obtained to reduction effect of calculation time by arithmetic operation through to block matching.

Smart Fire Image Recognition System using Charge-Coupled Device Camera Image (CCD 카메라 영상을 이용한 스마트 화재 영상 인식 시스템)

  • Kim, Jang-Won
    • Fire Science and Engineering
    • /
    • v.27 no.6
    • /
    • pp.77-82
    • /
    • 2013
  • This research suggested smart fire recognition system which trances firing location with CCD camera with wired/wire-less TCP/IP function and Pan/Tilt function, delivers information in real time to android system installed by smart mobile communication system and controls fire and disaster remotely. To embody suggested method, firstly, algorithm which applies hue saturation intensity (HSI) Transform for input video, eliminates surrounding lightness and unnecessary videos and segmentalized only firing videos was suggested. Secondly, Pan/Tilt function traces accurate location of firing for proper control of firing. Thirdly, android communication system installed by mobile function confirms firing state and controls it. To confirm the suggested method, 10 firing videos were input and experiment was conducted. As the result, all of 10 videos segmentalized firing sector and traced all of firing locations.

A Study on the Flow Control Mechanism based on RTP/RTCP for Real-Time Traffic Transmission (실시간 트래픽 전송을 위한 RTP/RTCP의 흐름제어 기법 연구)

  • Choi, Hyun-Ah;Song, Buk-Sub;Kim, Jeong-Ho
    • Proceedings of the Korea Contents Association Conference
    • /
    • 2007.11a
    • /
    • pp.60-64
    • /
    • 2007
  • Increasing using multimedia services as VoIP, Video conference, DMB, IPTV, etc, it is necessary to increase network traffics and develop the mechanism about a flow control for real time traffic transmission. In order to transfer realtime multimedia data, the transfer rate can be control on network state data measuring packet losses of a receiver and delay time of packets through getting periodical feedback RTP/RTCP packet. This paper describes using efficiant flow control on multicast that can reduce errors according to getting feedback tranfer delay and proposes the mechanism that can adapt dynamic change of network. In simulation, the transfer rate can efficiently be control on dynamic change of network and it makes the maximum of the use of a bandwidth and the minimum of packet losses.

  • PDF

An Optimal Implementation of Object Tracking Algorithm for DaVinci Processor-based Smart Camera (다빈치 프로세서 기반 스마트 카메라에서의 객체 추적 알고리즘의 최적 구현)

  • Lee, Byung-Eun;Nguyen, Thanh Binh;Chung, Sun-Tae
    • Proceedings of the Korea Contents Association Conference
    • /
    • 2009.05a
    • /
    • pp.17-22
    • /
    • 2009
  • DaVinci processors are popular media processors for implementing embedded multimedia applications. They support dual core architecture: ARM9 core for video I/O handling as well as system management and peripheral handling, and DSP C64+ core for effective digital signal processing. In this paper, we propose our efforts for optimal implementation of object tracking algorithm in DaVinci-based smart camera which is being designed and implemented by our laboratory. The smart camera in this paper is supposed to support object detection, object tracking, object classification and detection of intrusion into surveillance regions and sending the detection event to remote clients using IP protocol. Object tracking algorithm is computationally expensive since it needs to process several procedures such as foreground mask extraction, foreground mask correction, connected component labeling, blob region calculation, object prediction, and etc. which require large amount of computation times. Thus, if it is not implemented optimally in Davinci-based processors, one cannot expect real-time performance of the smart camera.

  • PDF

Embedded SoC Design for H.264/AVC Decoder (H.264/AVC 디코더를 위한 Embedded SoC 설계)

  • Kim, Jin-Wook;Park, Tae-Geun
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.45 no.9
    • /
    • pp.71-78
    • /
    • 2008
  • In this paper, we implement the H.264/AVC baseline decoder by hardware-software partitioning under the embedded Linux Kernel 2.4.26 and the FPGA-based target board with ARM926EJ-S core. We design several IPs for the time-demanding blocks, such as motion compensation, deblocking filter, and YUV-to-RGB and they are communicated with the host through the AMBA bus protocol. We also try to minimize the number of memory accesses between IPs and the reference software (JM 11.0) which is ported in the embedded Linux. The proposed IPs and the system have been designed and verified in several stages. The proposed system decodes the QCIF sample video at 2 frame per second when 24MHz of system clock is running and we expect the bitter performance if the proposed system is designed with ASIC.

Hybrid Scheduling Algorithm for Guaranteeing QoS of Real-time Traffic in WCDMA Enhanced Uplink (WCDMA 개선된 상향링크에서 실시간 트래픽의 서비스 품질을 보장하는 하이브리드 스케줄링 알고리즘)

  • Kang, You-Jin;Kim, Jun-Su;Sung, Dan-Keun
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.32 no.11A
    • /
    • pp.1106-1112
    • /
    • 2007
  • As a demand for high speed uplink packet services increases, the WCDMA enhanced uplink, also known as high speed uplink packet access (HSUPA), has been specified in release 6 by 3GPP. This HSUPA will provide various types of multimedia services, such as real-time video streaming, gaming, VoIP, and FTP. Generally, the performance of HSUPA is dominated by scheduling policy. Therefore, it is required to design a scheduling algorithm considering the traffic characteristics to provide QoS guaranteed services in various traffic environments. In this paper, we propose a scheduling algorithm considering the traffic characteristics to guarantee QoS in a mixed traffic environment. Finally, the performance of the proposed scheduling algorithm is evaluated in terms of average packet delay, packet delay jitter, and system throughput using a system level simulator.

Design of Invisible Watermarking for H.264/AVC Video Protection (H.264/AVC 비디오 보호를 위한 비가시적 워터마킹의 설계 및 검증)

  • Park, Hye-Jeong;Choi, Jun-Rim
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.45 no.6
    • /
    • pp.74-79
    • /
    • 2008
  • In this paper, we propose and design a new 0.264/AVC watermarking algorithm for protection of copyright by inserting a watermark after quantization. This invisible watermarking algorithm insets a watermark into chrominance components of I frame such that we can avoid degradation of original images. According to test results we could limit image degradation by 1dB, avoid bit rate increment within 2% and increase processing time by only 2%. The IP is designed by Hynix 0.25 micron technology and the maximum operating frequency of 115MHz is achieved. The PSNR of the embedded watermark is about 35dB according to the test result.

A New Hardware Architecture of High-Speed Motion Estimator for H.264 Video CODEC (H.264 비디오 코덱을 위한 고속 움직임 예측기의 하드웨어 구조)

  • Lim, Jeong-Hun;Seo, Young-Ho;Choi, Hyun-Jun;Kim, Dong-Wook
    • Journal of Broadcast Engineering
    • /
    • v.16 no.2
    • /
    • pp.293-304
    • /
    • 2011
  • In this paper, we proposed a new hardware architecture for motion estimation (ME) which is the most time-consuming unit among H.264 algorithms and designed to the type of intellectual property (IP). The proposed ME hardware consists of buffer, processing unit (PU) array, SAD (sum of absolute difference) selector, and motion vector (MVgenerator). PU array is composed of 16 PUs and each PU consists of 16 processing elements (PUs). The main characteristics of the proposed hardware are that current and reference frames are re-used to reduce the number of access to the external memory and that there is no clock loss during SAD operation. The implemented ME hardware occupies 3% hardware resources of StatixIII EP3SE80F1152C2 which is a FPGA of Altera Inc. and can operate at up to 446.43MHz. Therefore it can process up to 50 frames of 1080p in a second.