• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1644-1652
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• 2003

In this paper, we have analyzed that interference effect between wireless LAN(IEEE 802.11 a) and radar system in 5㎓ band. Recently, Korea frequency Authority is considering the frequency allocation of wireless LAN system about 5㎓ band that is previously used in radar system. The co­existence occurs interference problem between wireless LAN and radar system, so it is required to analyze the effect of co­channel interference. Accordingly, the frequency allocation could be predicted for wireless LAN system in 5㎓ band and the interference effect has been analyzed by simulation with the radar signal modeling. Simulation results which are presented by PER and EVM show that high SIR(20 ㏈) is required to achieve the target PER about 10­1.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.3
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• pp.1213-1237
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• 2019

Vehicular Ad-hoc Network (VANET) facilities envision future Intelligent Transporting Systems (ITSs) by providing inter-vehicle communication for metrics such as road surveillance, traffic information, and road condition. In recent years, vehicle manufacturers, researchers and academicians have devoted significant attention to vehicular communication technology because of its highly dynamic connectivity and self-organized, decentralized networking characteristics. However, due to VANET's high mobility, dynamic network topology and low communication coverage, dissemination of large data packets (e.g. multimedia content) is challenging. Clustering enhances network performance by maintaining communication link stability, sharing network resources and efficiently using bandwidth among nodes. This paper proposes a mobility-based, multi-hop clustering algorithm, (MBCA) for multimedia content broadcasting over an IEEE 802.11p-LTE-enabled hybrid VANET architecture. The OMNeT++ network simulator and a SUMO traffic generator are used to simulate a network scenario. The simulation results indicate that the proposed clustering algorithm over a hybrid VANET architecture improves the overall network stability and performance, resulting in an overall 20% increased cluster head duration, 20% increased cluster member duration, lower cluster overhead, 15% improved data packet delivery ratio and lower network delay from the referenced schemes [46], [47] and [50] during multimedia content dissemination over VANET.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.20 no.2
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• pp.23-32
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• 2010

WiBro(Wireless Broadband), the service based on IEEE 802.16e(mobile WiMAX) standard, is a wireless broadband Internet technology being developed by the domestic telecommunication industry. In this paper, we analyze security vulnerabilities of WiBro focusing on initial authentication phase and propose a specification-based intrusion detection system that can detect those vulnerabilities. We first derive a specification from the normally operational process of the initial authentication based on PKMv2 EAP-AKA and formalize the derived specification as a state transition diagram. Proposed system executes the intrusion detection based on those specification and state transition diagram. In this paper, to verify the detection capability of proposed system, we construct a test bed network and execute scenario-based test.

• Journal of Digital Convergence
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• v.11 no.7
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• pp.201-207
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• 2013

The chirp signaling has been mainly used in radar systems due to its good correlation characteristics, and nowadays it is applied to real time locating system(RTLS). The RTLS with chirp signaling was chosen as a standard such as ISO/IEC 24730-5 and IEEE 802.15.4a. In this paper, the performance of a real time locating system with chirp signaling was evaluated and simulated with relative distance error rates. We considered three cases of S/I = -30[dB], -20[dB], and -10[dB] with Rician factor K=10 and K=20. The performance was enhanced with K factor improvement by 25%, 27% and 50% for respective three cases of S/I. As results, in case of S/I < -20[dB], the minimum signal power is required for performance improvement even though the line of sight component is helpful. And also, in case of S/I ${\geq}$ -20[dB], as the line of sight component is stronger the better performance is obtained.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.4
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• pp.333-337
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• 2004

This paper describe a design of 5GHz OFDM baseband chip for IEEE 802.11a wireless LAN. The proposed device is consists of transmitter and receiver within a single FPGA chip. We applied single tap equalizer that use Normalized LMS algorithm to remove ISI that happen at high speed data transmission. And also, we used carrier wave frequency offset algorithm that use training symbol to remove ICI. The simulation results show the correct transmission without errors the between transmitter and receiver And we can remarkably reduce the number of register through the synthesized circuits by using DSP block and EMB(Embedded Memory Block). The target device for implementation of the synthesized circuits is Altera Stratix EPIS25FC672 FPGA and design platform is VHDL.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.7
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• pp.11-20
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• 1996

In this paper, the performance of the IeEE 802.4 token-passing is analyzed under the assumption that all nodes have finite buffers and finite THT (token tolding time). The loads generated at nodes are assumed to be asymmetric. The priority mechanism is not considered. This paper derives an approximate matrix equation of the queue length distributin in terms of the number of nodes, frame arrival rate and mean service time of a frame in steady state. Based on the matrix equation, the mean token rotation time, the mean waiting time and the blocking probability are derived analytically. the analytic results are compared with simulation results in order to show that the deviations are small.

• Journal of Advanced Navigation Technology
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• v.21 no.6
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• pp.659-665
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• 2017

In this paper, a low complexity fast Fourier transform(FFT) processor is proposed for multiple input multiple output(MIMO) systems. The IEEE 802.11ac standard has been adopted along with the demand for a system capable of high channel capacity and Gbps transmission in order to utilize various multimedia services using a wireless LAN. The proposed scalable FFT processor can support the variable length of 64, 128, 256, and 512 for 8x8 antenna configuration as specified in IEEE 802.11ac standard with MIMO-OFDM scheme. By reducing the required number of non-trivial multipliers with mixed-radix(MR) and multipath delay commutator(MDC) architecture, the complexity of the proposed FFT processor was dramatically decreased. Implementation results show that the proposed FFT processor can reduced the logic gate count by 50%, compared with the radix-2 SDF FFT processor. Also, compared with the 8-channel MR-2/2/2/4/2/4/2 MDC processor and 8-channel MR-2/2/2/8/8 MDC processor, it is shown that the gate count is reduced by 18% and 17% respectively.

• Journal of Computing Science and Engineering
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• v.8 no.3
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• pp.129-136
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• 2014

This paper presents the equivalent circuit modelling and eigenfrequency analysis of a wideband robust capacitive radio frequency (RF) microelectromechanical system (MEMS) switch that was designed using Poly-Si and Au layer membrane for highly reliable switching operation. The circuit characterization includes the extraction of resistance, inductance, on and off state capacitance, and Q-factor. The first six eigenfrequencies are analyzed using a finite element modeler, and the equivalent modes are demonstrated. The switch is optimized for millimeter wave frequencies, which indicate excellent RF performance with isolation of more than 55 dB and a low insertion loss of 0.1 dB in the V-band. The designed switch actuates at 13.2 V. The R, L, C and Q-factor are simulated using Y-matrix data over a frequency sweep of 20-100 GHz. The proposed switch has various applications in satellite communication networks and can also be used for devices that will incorporate the upcoming IEEE Wi-Fi 802.11ad protocol.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.98-101
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• 2007

A fully integrated 5-GHz CMOS power amplifier for IEEE 802.11a WLAN applications is implemented using $0.18-{\mu}m$ CMOS technology. An on-chip transmission-line transformer is used for output matching network and voltage combining. Input balun, inter-stage matching components, output transmission line transformer and RF chokes are fully integrated in the designed amplifier so that no external components are required. The power amplifier occupies a total area of $1.7mm{\times}1.2mm$. At a 3.3-V supply voltage, the amplifier exhibits a 22.6-dBm output 1-dB compression point, 23.8-dBm saturated output power, 25-dB power gain. The measured power added efficiency (PAE) is 20.1 % at max. peak, 18.8% at P1dB. When 54 Mbps/64 QAM OFDM signal is applied, the PA delivers 12dBm of average power at the EVM of -25dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.12C
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• pp.1282-1287
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• 2002

In this Paper, we present the design of 10Mbps HomePNA(Home Phoneline Networking Alliance) PHY which is Home Network Technology using phone-line. It is connected with external interface through MII(Media Independent Interface) and AFE(Analog Front End) Interface. 10Mbps HomePNA PHY is composed with Management Block IEEE 802.3 CSMA/CD MAC(Media Access Control) Block Modulator block and Demodulator block. For their verification, we designed a prototype FPGA PCB board using XPC860T made in Motorola. We verified HomePNA frame data transmission using a driver program based Linux kernel. we verified rate negotiation by HomepNA 2.0 Link Layer Protocol.