• Title/Summary/Keyword: IEEE 802.11 n

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Efficient Block ACK Scheme for Reducing the Number of Retransmitted Frames in IEEE 802.11n Wireless LANs (IEEE 802.11n 무선 랜에서 재전송 프레임 수를 줄이기 위한 향상된 Block ACK 방법)

  • Lee, Hyun-Woong;Kim, Sunmyeng
    • Journal of the Korea Society for Simulation
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    • v.23 no.4
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    • pp.65-74
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    • 2014
  • IEEE 802.11n standard has introduced the new schemes in MAC and PHY layers to improve network throughput. Frame aggregation and Block ACK are mainly defined to increase the efficiency of the MAC layer. There exists still problem in IEEE 802.11n. When block ACK request and/or response frames are missing or received in error, the sender does not know the status (success/failure) of each frame in the aggregated large frame and retransmits all the frames. This can cause a lower network performance. To solve this problem, we propose a new effective scheme, called reduced retransmission of MPDUs (RRM) scheme. In the proposed scheme, when a sender does not receive a block ACK response frame, it just transmits a next data frame and requests a block ACK. Therefore, it can retransmits the erroneous frames. Performance of the proposed scheme is investigated by simulation. Our results show that the proposed scheme is very effective and improves the performance under a wide range of channel error conditions.

Implementation of IEEE 802.11n MAC using Design Methodology (통합된 구현 방식을 이용한 IEEE 802.11n MAC의 설계)

  • Chung, Chul-Ho;Lee, Sun-Kee;Jung, Yun-Ho;Kim, Jae-Seok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.4B
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    • pp.360-367
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    • 2009
  • In this paper, we propose a design methodology of IEEE 802.11n MAC which aims to achieve the higher throughput of more than 100Mbps in downlink as measured at the MAC-SAP and present the implementation results of MAC using the proposed design methodology. With our proposed methodology, different from the conventional design flow which has the separate codes for the protocol validation, for the network simulation, and for the system implementation, the unified code can be used for the network simulation and the implementation of software and hardware. Our MAC architecture is partitioned into two parts, Upper-layer MAC and Lower-layer MAC, in order to achieve the high efficiency for the new features of IEEE 802.11n standard. They are implemented in software and hardware respectively. The implemented MAC is tested on ARM based FPGA board.

Evaluation of Interference Alignment for MIMO-IC based on IEEE 802.11n (IEEE 802.11n 기반 MIMO-IC의 간섭정렬 성능평가)

  • Bae, Insan;Yun, Heesuk;Kim, Jaemoung
    • Journal of Satellite, Information and Communications
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    • v.8 no.4
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    • pp.47-52
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    • 2013
  • In this paper, The existing interference alignment algorithms were analyzed in Rayleigh fading channel environment. The interference alignment techniques are divided to two parts. First thing is Iterative-method, another is Linear-method. Iterative method needs local channel info, but it has the constraint of iteration. On the other hand Linear-method must have global channel info, but has free of iteration and better performance. This paper evaluates the performance of interference alignment algorithms in Rayleigh fading channel of outdoor environment and WLAN channel based on IEEE 802.11n of indoor environment.

An analysis of Multi-mode LDPC Decoder Performance for IEEE 802.11n WLAN (IEEE 802.11n WLAN용 Multi-mode LDPC 복호기의 성능 분석)

  • Park, Hae-Won;Na, Young-Heon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.80-83
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    • 2010
  • This paper describes an analysis of decoding performance of multi-mode LDPC(Low Density Parity Check) decoder which supports three block lengths (648, 1296, 1944) and four code rates (1/2, 2/3,3/4, 5/6) for IEEE 802.11n WLAN system. A fixed-point model of LDPC decoder which adopts min-sum algorithm and layered decoding scheme is implemented using Matlab. From fixed-point simulation results for various bit-width parameters such as internal bit-width, bit-width of integer and fractional parts, an optimal design condition and decoding performance of LDPC decoder are analyzed.

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An analysis of Optimal Design Conditions of Multi-mode LDPC Decoder for IEEE 802.11n WLAN System (IEEE 802.11n WLAN용 다중모드 LPDC 복호기의 최적 설계조건 분석)

  • Park, Hae-Won;Na, Young-Heon;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.2
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    • pp.432-438
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    • 2011
  • This paper describes an analysis of optimal design conditions of multi-mode LDPC(low density parity check) decoder which supports three block lengths (648, 1296, 1944) and four code rates (1/2, 2/3, 3/4, 5/6) for IEEE 802.11n WLAN system. A fixed-point model of LDPC decoder, which adopts min-sum algorithm and layered decoding scheme, is implemented using Matlab. From fixed-point simulation results for various bit-width parameters such as internal bit-width, integer/fractional part bit-widths, optimal design conditions and decoding performance of LDPC decoder are analyzed.

An Area-efficient Implementation of Layered LDPC Decoder for IEEE 802.11n WLAN (IEEE 802.11n WLAN 표준용 Layered LDPC 복호기의 저면적 구현)

  • Jeong, Sang-Hyeok;Na, Young-Heon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.486-489
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    • 2010
  • This paper describes a layered LDPC decoder which supports block length of 1,944 bits and code rate 1/2 for IEEE 802.11n WLAN standard. To reduce the hardware complexity, the min-sum algorithm and layered architecture is adopted. A novel memory reduction technique suitable for min-sum algorithm reduces memory size by 75% compared with conventional method. The designed processor has 200,400 gates and 19,400 bits memory, and it is verified by FPGA implementation. The estimated throughput is about 200 Mbps at 120 MHz clock by using Xilinx Virtex-4 FPGA device.

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An Architecture for IEEE 802.11n LDPC Decoder Supporting Multi Block Lengths (다중 블록길이를 지원하는 IEEE 802.11n LDPC 복호기 구조)

  • Na, Young-Heon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.798-801
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    • 2010
  • This paper describes an efficient architecture for LDPC(Low-Density Parity Check) decoder, which supports three block lengths (648, 1,296, 1,944) of IEEE 802.11n standard. To minimize hardware complexity, the min-sum algorithm and block-serial layered structure are adopted in DFU(Decoding Function Unit) which is a main functional block in LDPC decoder. The optimized H-ROM structure for multi block lengths reduces the ROM size by 42% as compared to the conventional method. Also, pipelined memory read/write scheme for inter-layer DFU operations is proposed for an optimized operation of LDPC decoder.

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A Study on efficient transmission performance improvement Considering the security in the wireless LAN environment (무선랜 환경에서 보안을 고려한 효율적 전송성능 향상에 관한 연구)

  • Hwang, Seong-Kyu;Han, Seung-Jo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.4
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    • pp.837-846
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    • 2013
  • Recently, new technologies based on wireless LAN is being studied because utilization on smart phone using Wi-Fi is increased. 802.11 b/g/a is universalized wireless LAN technologies based on ISM, the standard developed in 11's working group of IEEE 802. standardization about IEEE 802.11ac that overcame limitation on Blue-ray of IEEE 802.11n or uncompressed video transmission and IEEE 802.af's technologies using TVWS is being actively studied. In this paper, ability of transmission considering the security on AP operated by these technologies have measured and done a comparative analysis with existing wireless LAN environment ability of transmission measured when appling security is more stable than existing ability of transmission in an environment with obstacles and shorten of transmission time is confirmed as a result of analysis.

THE MAC LAYER PACKET SERVICE TIME DISTRIBUTIONS OF DCF IN THE IEEE 802.11 PROTOCOL

  • Han Dong-Hwan;Park Chul-Geun
    • Journal of applied mathematics & informatics
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    • v.22 no.1_2
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    • pp.501-515
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    • 2006
  • The IEEE 802.11 protocol is the most mature technology for WLANs(Wireless Local Area Networks). However, as the number of stations increases, the delay and throughput performance of IEEE 802.11 MAC(Medium Access Control) degrades severely. In this paper, we present the comprehensive performance analysis of IEEE 802.11 MAC protocol by investigating the MAC layer packet service time when arrival packet sizes have a general probability distribution. We obtain the discrete probability distribution of the MAC layer service time. By using this, we analyze the system throughput and the MAC layer packet service time of IEEE 802.11 MAC protocol in wireless LAN environment. We take some numerical examples for the system throughput and the mean packet service time for several special distributions of arrival packet sizes.

Wireless Network Synchronization Algorithm based on IEEE 802.11 WLANs (Wireless Local Area Networks) for Multimedia Services (멀티미디어 서비스를 위한 IEEE 802.11 WLANs 기반의 무선 네트워크 동기화 알고리즘)

  • Yoon, Jong-Won;Joung, Jin-Oo
    • Journal of the Korea Society of Computer and Information
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    • v.13 no.6
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    • pp.225-232
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    • 2008
  • When a single source of multimedia contents is distributed to multiple reproduction devices, the audio and video contents require synchronous play for multi-channel stereo sound and lip-synchronization. The multimedia system in vehicle, especially, has researched to move to wireless environments from legacy wired environments. This paper proposes the advanced algorithm for providing synchronized services of real-time multimedia traffic in IEEE 802.11 WLANs [1]. For these, we implement the advanced IEEE 1588 Precision Time Protocol [2] and the environments for simulation. Also, we estimate and analysis performance of the algorithm, then we experiment and analysis after the porting of algorithm in wireless LAN devices (Linksys wrt-350n AP network device) to characterize timing synchronization accuracy.

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