• Title/Summary/Keyword: IC device

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Design and Implementation of Inter-IC Bus Interface for Efficient Bus Control in the Embedded System (임베디드 시스템에서 효율적인 주변장치 관리를 위한 Inter-IC Bus Interface 설계 및 구현)

  • Seo, Kyung-Ho;Seong, Kwang-Su;Choi, Eun-Ju
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.535-536
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    • 2006
  • In the embedded system, external device interface that operates serial protocol with lower speed than the general computers is used commonly. This paper describes I2C bus protocol that is a bi-directional serial bus with a two-pin interface. The I2C bus requires a minimum amount of hardware to relay status and reliability information concerning the processor subsystem to an external device.

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Circuit Integration Technology of Low-Temperature Poly-Si TFT LCDs

  • Motai, Tomonobu
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.75-80
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    • 2004
  • By the SOG (System-on-Glass) technology with excimer laser anneal process, the number of IC chips and the area of the mounted IC chips on the printed circuit board are reduced. In new circuit integrations on the glass substrate, we have developed D/A converter including the new capacitor array, amplifier comprising the original comparators and new display device with capturing images by integrated sensor into a pixel. This paper discusses the application of circuit integration of low-temperature poly-Si.

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A Study on the Design and Electrical Characteristics of High Performance Smart Power Device (고성능 Smart Power 소자 설계 및 전기적 특성에 관한 연구)

  • Ku, Yong-Seo
    • Journal of IKEEE
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    • v.7 no.1 s.12
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    • pp.1-8
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    • 2003
  • In this study, the high performance BCD device structure which satisfies the high voltage and fast switching speed characteristics is devised. Through the process and device simulation, optimal process spec. & device spec. are designed. We adapt double buried layer structure, trench isolation process, n-/p-drift region formation and shallow junction technology to optimize an electrical property as mentioned above. This I.C consists of 20V level high voltage bipolar npn/pnp device, 60V level LDMOS device, a few Ampere level VDMOS, 20V level CMOS device and 5V level logic CMOS.

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On-site Investigation and Verification of Effect of the Sea Urchin Removal Devices (전기장 자극을 활용한 성게제거장치의 해상성능 평가)

  • Kim, Dae-Jin;Lee, Jungkwan;Kim, Seonghun;Oh, Wooseok;Oh, Taegeon;Lee, Donggil;Lee, Kyounghoon
    • Korean Journal of Fisheries and Aquatic Sciences
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    • v.53 no.6
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    • pp.954-959
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    • 2020
  • This study aimed to verify the effectiveness of rescue apparatus, that can capture crabs using external stimuli such as food and electricity, without relying on divers. In this study, a microcomputer-based controller and an IC-device-based controller were developed, and spot inspection was conducted using 20 modules and 30 sea urchin removal modules. Accordingly, 58, 18, 17, and 74 sea urchins were introduced in the first, second, third and fourth experiments, respectively. The result of evaluating the lure of each removal mechanism, based on the catch per unit effort, with an electrical stimulus was 1.1 (32/10), with a feeding stimulus was 3.4 (100/29), and with electrical and feeding stimuli was 3.5 (35/10).

Pattern recognition of SMD IC using wavelet transform and neural network (웨이브렛 변환과 신경회로망을 이용한 SMD IC 패턴인식)

  • 이명길;이준신
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.34S no.7
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    • pp.102-111
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    • 1997
  • In this paper, a patern recognition method of surface mount device(SMD) IC using wavelet transform and neural network is proposed. We chose the feature parameter according to the characteristics of coefficient matrix which is obtained from four level discrete wavelet transform (DWT). These feature parameters are normalized and then used for the input vector of neural network which is capable of adapting the surroundings such as variation of illumination, arrangement of objects and translation. Experimental results show that when the same form of feature pattern, as is used for learning, is put into neural network and gained 100% rate ofrecognition irrespective of SMD IC kinds, location and variation of illumination. In the case of unused feature pattern for learning, the recognition rate is 85.9% under the similar surroundings, where as an average recognition rate is 96.87% for the case of reregulated value of illumination. Proosed method is relatively simple compared with the traditional space domain method in extracting the feature parameter and is also well suited for recognizing the pattern's class, position and existence. It can also shorten the processing tiem better than method extracting feature parameter with the use of discrete cosine transform(DCT) and adapt the surroundings such as variation of illumination, the arrangement and the translation of SMD IC.

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A Study on UICC(Universal IC Card)-based Authentication Mechanism using OTP (OTP를 활용한 UICC(Universal IC Card) 기반의 인증 메커니즘에 관한 연구)

  • Kang, Soo-Young;Lee, Im-Yeong
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.18 no.2
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    • pp.21-31
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    • 2008
  • Ubiquitous environment is constructed by development of an IT technology, offer environment of many service changed to mobile environment. Also, existed service offered at fixed position like home or company, but according to development of mobile device. user require service as moving. Wibro can offer as user moving using mobile device. As requirement should be included authentication, in case of authentication between UICC and AAA authentication server is offered in Wibro, service is available. However, when UICC requires initial authentication to AAA authentication server, identification information of UICC expose as plaintext, so privacy infringement of mobile device occurs. Therefore, identification information of terminal generate randomly using OTP(One-Time Password) that generated in mobile terminal, and we proposed mechanism of privacy protection. Also, we proposed mechanism that offer secure service to user as offer authentication from OTP framework, and offer OTP combination authentication detailedly.

Development of Multiple Channel Measurement System for IC Socket (IC 소켓 검사용 다중 채널 측정 시스템 개발)

  • Gang, Sang-Il;Song, Sung-Yong;Yoon, Dal-Hwan
    • Journal of IKEEE
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    • v.25 no.2
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    • pp.315-321
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    • 2021
  • In this paper, we have developed the multiple channel measurement system for IC Socket Test. The one can test the current-voltage measurements for pitting the several device specification, which analyze the thin current from several ㎂ to 5A with very low resistor mΩ. The increasement of the IC socket channel with lead pitch under 0.25 mm be need to perform several functions, concurrently. The system to perform these functions be designed to integrate several SMU(source measure unit) on board. So, we can reduce the 2 minutes test time per channel point to 40 sec, with daisy chain test method. Using by graphic interface, I-V curve mode and data logging technologies, we can implement the test flow methods and can make economies the time and cost.

Improvement and Verification of TMFT Power Circuit Design (전술다기능단말기(TMFT)의 전원회로 설계 개선 및 검증)

  • Kim, Jin-Sung;Kim, Byung-Jun;Kim, Byung-Soo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.15 no.2
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    • pp.357-362
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    • 2020
  • The TMFT, a sub-system of TINC, provides voice calls, data transmission and reception, and multimedia services to individual users. At the time of development in 2011, the power circuit of the TMFT was designed to electrical power supply to each device via a charger IC. However, the newly improved power supply circuit allows power to be supplied to each device through the PMIC without configuring the charger IC separately. In this paper, the power circuit design structure of TMFT applied in the development stage and the improved power circuit design structure were compared. And we verified through experiments whether the improved power circuit can be applied to TMFT. The experimental method was verified by directly comparing the current consumption test, charge time comparison test, and rising temperature test during charging each of before and after improvement terminals.

Design of a Low Noise 6-Axis Inertial Sensor IC for Mobile Devices (모바일용 저잡음 6축 관성센서 IC의 설계)

  • Kim, Chang Hyun;Chung, Jong-Moon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.2
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    • pp.397-407
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    • 2015
  • In this paper, we designed 1 chip IC for 3-axis gyroscope and 3-axis accelerometer used for various IoT/M2M mobile devices such as smartphone, wearable device and etc. We especially focused on analysis of gyroscope noise and proposed new architecture for removing various noise generated by gyroscope MEMS and IC. Gyroscope, accelerometer and geo-magnetic sensors are usually used to detect user motion or to estimate moving distance, direction and relative position. It is very important element to designing a low noise IC because very small amount of noise may be accumulated and affect the estimated position or direction. We made a mathematical model of a gyroscope sensor, analyzed the frequency characteristics of MEMS and circuit, designed a low noise, compact and low power 1 chip 6-axis inertial sensor IC including 3-axis gyroscope and 3-axis accelerometer. As a result, designed IC has 0.01dps/${\sqrt{Hz}}$ of gyroscope sensor noise density.

Temperature Compensated Hall-Effect Power IC for Brushless Motor

  • Lee, Cheol-Woo;Jang, Kyung-Hee
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.74-77
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    • 2002
  • In this paper we present a novel temperature compensated Hall effect power IC for accurate operation of wide temperature and high current drive of the motor coil. In order to compensate the temperature dependence of Hall sensitivity with negative temperature coefficient(TC), the differential amplifier has the gain consisted of epi-layer resistor with positive TC. The material of Hall device and epi-resistor is epi-layer with the same mobility. The variation of Hall sensitivity is -38% at 150$^{\circ}C$ and 88% at - 40$^{\circ}C$. But the operating point(B$\sub$op/) and release point(B$\sub$RP/) of the Hall power IC are within ${\pm}$25%. The experimental results show very stable and accurate performance over wide temperature range of -40$^{\circ}C$ to 125$^{\circ}C$.

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