• 전기학회논문지
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• 제60권1호
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• pp.119-123
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• 2011

We have investigated the luminous efficiency of various cell resolution and structure from 50" FHD to 50" QFHD Plasma Display. The suggested test panels have two different cell array types which are the delta and matrix cell array type. The results showed that, in the case of the suggested QFHDs, the firing and sustain voltage were increased and voltage margin was decreased. These results are caused by the reduced wall voltage and increased charged particle loss, at the side wall. The luminance of the suggested QFHDs was lower from 20% to 40% than that of the suggested FHDs and the power consumption was higher from 42% to 83% than that of the suggested FHDs. In conclusion, the maximum luminous efficiency of the suggested QFHD(D110) has reached about 38%, compared with suggested FHDs($\fallingdotseq$ 2.7 lm/W).

• 반도체디스플레이기술학회지
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• 제19권2호
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• pp.11-15
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• 2020

In a typical initial setup of a PCB component inspection system, operators should manually input various information such as category, position, and inspection area for each component to be inspected, thus causing much inconvenience and longer setup time. Although there are many deep learning based object detectors, RetinaNet is regarded as one of best object detectors currently available. In this paper, a method using an extended RetinaNet is proposed that automatically detects its component category and position for each component mounted on PCBs from a high-resolution color input image. We extended the basic RetinaNet feature pyramid network by adding a feature pyramid layer having higher spatial resolution to the basic feature pyramid. It was demonstrated by experiments that the extended RetinaNet can detect successfully very small components that could be missed by the basic RetinaNet. Using the proposed method could enable automatic generation of inspection areas, thus considerably reducing the setup time of PCB component inspection systems.

• 반도체디스플레이기술학회지
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• 제21권3호
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• pp.125-129
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• 2022

The current display technology tends to be highly integrated with high resolution, the element size is gradually downsized, and the structure becomes complicated. Inductively coupled plasma (ICP) dry etcher of various types of etching equipment is a structure that places a large multi-divisional antenna source on the top lid, passes current to the Antenna, and generates plasma using the induced magnetic field generated at this time. However, in the case of a device of a large area size, a support that can withstand a load structurally is necessary, and when these support portions are applied, arrangement of antenna becomes difficult, which causes reduction in uniformity. As described above, the development of antenna source of a large area having a uniform plasma density on the whole surface is difficult to restrict hardware (H/W). As a solution to this problem, we confirmed the change in uniformity of plasma by applying two kinds of specific shape faraday shield(FICP) to the lower part of the large area upper lid antenna of 6 and 8th more than that generation size. In this thesis, we verify the faraday shield effect which can improve plasma uniformity control of ICP dry etcher equipment applied to medium and large displays.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1809-1811
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• 1999

In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate delay, feed-through voltage and image sticking. Gate delay is one of the biggest limiting factors for large-screen-size, high-resolution thin-film transistor liquid crystal display (TFT/LCD) design. Many driving method proposed for TFT/LCD progress. Thus we developed gate driving signal generator. Since Pixel-Design Array Simulation Tool (PDAST) can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the driving signals of gate lines on the pixel operations can be effectively analyzed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 심포지엄 논문집 정보 및 제어부문
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• pp.239-242
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• 2005

A high speed address recovery technique for AC plasma display Panel(PDP) is proposed. By removing the GND switching operation, the recovery speed can be increased and switching loss due to GND switch also becomes to be reduced. The proposed method is able to perform load-adaptive operation by controlling the voltage level of energy recovery capacitor, which prevents increasing inefficient power consumption caused by circuit loss during recovery operation. Thus, the technique shows the minimum address power consumption according to various displayed images, different from Prior methods operating in fixed mode regardless of images. Test results with 50" HD single-scan PDP(resolution = 1366$\times$768) show that less than 350ns of recovery time is successfully accomplished and about 54% of the maximum power consumption can be reduced, tracing minimum power consumption curves.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.415-424
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• 2016

This paper describes a high data rate proximity transmitter design for high resolution smartphone-mirrored display applications. A 2 Gb/s transmitter is designed with a low transmission power of -70 dBm/MHz and a wide bandwidth of nearly 3 GHz. A digital pre-correction method is employed in the transmitter to mitigate the inter-symbol interference problem. A carrier-based digital pulse shaping and a reconfigurable digital envelope generation methods are employed for robust operation by utilizing 20 phases from a 2 GHz phase-locked loop. A 6.5-9.5 GHz transmitter implemented in 65 nm CMOS achieves the maximum data rate of 2 Gb/s, consuming only 7.6 mW from a 1 V supply.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권9호
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• pp.450-453
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• 2005

A high speed address recovery technique for AC plasma display panel(PDP) is proposed. Replacing GND switch by clamping diode. the recovery speed can be increased by saving GND hold-time and switching loss due to GND switch also becomes also be reduced. The proposed method is able to perform load-adaptive operation by controlling the voltage level of energy recovery capacitor, which prevents increasing inefficient power consumption caused by circuit loss during recovery operation. Test results with 50' HD single-scan PDP(resolution = 1366$\times$768) show that less than 3sons of recovery time is successfully accomplished and about$54\%$ of the maximum power consumption can be reduced, tracing minimum power consumption curves.

• 방송공학회논문지
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• 제9권4호
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• pp.391-401
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• 2004

본 논문은 고해상도 영상 서비스를 위하여 부분 영상의 공간임의접근(Spatial Random Access)을 효과적으로 구현하기 위하여 비트 스트림 지도 (B-map)를 이용한 부호화 방법을 제안한다. 다양한 환경에서, TV 브라운관, 모니터, PDA용 LCD와 같은 표준 디스플레이 장치들은 디지틸 시네마 또는 파노라마 영상과 같은 고해상도 영상을 위한 충분한 해상도와 프레임 크기를 지원하지 못하는 실정이다. 따라서 사용자는 다운샘플링된 저해상도의 영상이나 디스플레이의 크기에 맞춰진 부분 영상만을 볼 수밖에 없다. 제안한 B-map은 부호화 과정에서 생성된 비트 스트림에 대한 블록 단위의 배열 정보를 가지고 있으며, 복호 시 해당 영상의 비트 스트림보다 앞서 보내져 참조됨으로써 효과적인 지역 복호(Local decoding)를 가능하게 한다. B-map을 이용한 방식은 타일링을 비롯한 비교 대안들에 비해 효율적인 지역 복호화를 구현할 수 있음을 실험을 통해 확인하였다.

• 한국컴퓨터그래픽스학회논문지
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• 제29권5호
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• pp.31-40
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• 2023

디스플레이의 해상도의 증가에 따라 고해상도 텍스처 맵을 내장한 앱들도 함께 증가하는 추세에 있다. 최근 딥러닝 기반 이미지 초해상도 기법들의 발전은 이러한 고해상도 텍스처 생성 작업을 자동화할 수 있는 가능성을 만들고 있다. 하지만 이러한 적용 사례에 대해 심층적으로 분석한 연구는 아직 부족한 상태이다. 그래서 본 논문에서는 최신 초해상도 기법들 중 BSRGAN, Real-ESRGAN, SwinIR(classical 및 real-world image SR)을 택하여 텍스처 맵의 업스케일링(upscaling)에 적용한 후 그 결과를 정량적, 정성적으로 비교, 분석하였다. 실험 결과 업스케일링 후 나타나는 다양한 아티팩트(artifact)들을 발견할 수 있었으며, 이를 통해 기존 초해상도 기법들을 텍스처 맵 업스케일링에 곧바로 적용하기에는 일부 미흡한 부분이 존재한다는 점을 확인하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.524-524
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• 2006

For decades, the pursuit of volume commercialization of low-power reflective displays with a paper-like look has been an unfulfilled dream. While steady technical progress was made throughout the late 1990s, there were still no volume products incorporating electronic paper displays (EPD) on the market. Now, microencapsulated electrophoretic display technology, also called electronic ink, has moved into volume production with a frontplane laminate (FPL) display component called E Ink Imaging Film™. This film is coated roll to roll on a flexible plastic substrate and integrated into a display module. Today, all-plastic segmented displays are being shipped as well as displays with electronic ink FPL being driven by glass TFT backplanes. A roadmap to active matrix flexible electrophoretic displays is being enabled by rapid technical progress on flexible TFT backplanes by a variety companies. Each of the approaches to these backplanes and flexible active matrix displays has different advantages for the various market segments being pursued including large format flexible displays for e-news and other reader applications, rollable displays for compact readers, and high resolution small format displays up to 400 ppi that can have fully integrated drive electronics to reduce size and drive down costs. Backplane approaches include Si on plastic, organic transistors on plastic, and Si transistors on flexible stainless steel substrate. Progress is also being made on next generation inks, including more reflective inks with higher contrast ratios. A full color 6 inch, 170 pixel per inch (PPI) active matrix display using a newer generation ink has been developed and this will be described and demonstrated. Large format segmented flexible displays will also be described.