• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.832-835
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• 2005

Organosilicate Glass has quite a long history in the Semiconductor industry but has received very limited evaluation for Display industry applications. In this paper, we would like to introduce several kinds of Organosilicate Glasses for Display applications.

• Proceedings of the KSME Conference
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• 2003.11a
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• pp.1932-1938
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• 2003

We have applied spectroscopic ellipsometry to investigate $high-{\kappa}$ dielectric thin films and correlate their optical properties with fabrication processes, in particular, with high temperature annealing. The use of high-k dielectrics such as $HfO_{2}$, $Ta_{2}O_{5}$, $TiO_{2}$, and $ZrO_{2}$ as the replacement for $SiO_{2}$ as the gate dielectric in CMOS devices has received much attention recently due to its high dielectric constant. From the characteristics found in the pseudo-dielectric functions or the Tauc-Lorentz dispersions, the optical properties such as optical band gap, polycrystallization, and optical density will be discussed.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.11a
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• pp.36.2-36.2
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• 2009

Low dielectric materials have been great attention in the semiconductor industry to develop high performance interlayer dielectrics with low k for Cu interconnect technology. In our study, the dielectric properties of SiOC /SiO2 thin film derived from polyphenylcarbosilane were investigated as a potential interlayer dielectrics for Cu interconnect technology. Polyphenylcarbosilane was synthesized from thermal rearrangement of polymethylphenylsilane around $350^{\circ}C{\sim}430^{\circ}C$. Characterization of synthesized polyphenylcarbosilane was performed with 29Si, 13C, 1H NMR, FT-IR, TG, XRD, GPC and GC analysis. From FT-IR data, the band at 1035 cm-1 is very strong and assigned to CH2 bending vibration in Si-CH2-Si group, indicating the formation of the polyphenylcarbosilane. Number average of molecular weight (Mn) of the polyphenylcarbosilane synthesized at $400^{\circ}C$ for 6hwas 2, 500 and is easily soluble in organic solvent. SiOC/SiO2 thin film was fabricated on ton-type silicon wafer by spin coating using 30wt % polyphenylcarbosilane incyclohexane. Curing of the film was performed in the air up to $400^{\circ}C$ for 2h. The thickness of the film is ranged from $1{\mu}m$ to $1.7{\mu}m$. The dielectric constant was determined from the capacitance data obtained from metal/polyphenylcarbosilane/conductive Si MIM capacitors and show a dielectric constant as low as 2.5 without added porosity. The SiOC /SiO2 thin film derived from polyphenylcarbosilane shows promising application as an interlayer dielectrics for Cu interconnect technology.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.45-49
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• 2001

We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1444-1446
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• 2009

The atmospheric pressure plasma polymerization of acrylate monomers was carried out to have dielectrics with easy preparation and high performance. The effects of discharge power, monomer concentration and deposition time on film properties were investigated using various characterization tools. With proper conditions, smooth dielectric layer of 100nm thickness was obtained. Dielectric property as organic dielectric layer has been studied for future applications in organic thin film transistors(OTFT).

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.79-99
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• 2010

Pulsed current-voltage (I-V) methods are introduced to evaluate the impact of fast transient charge trapping on the performance of high-k dielectric transistors. Several pulsed I-V measurement configurations and measurement requirements are critically reviewed. Properly configured pulsed I-V measurements are shown to be capable of extracting such device characteristics as trap-free mobility, trap-induced threshold voltage shift (${\Delta}V_t$), as well as effective fast transient trap density. The results demonstrate that the pulsed I-V measurements are an essential technique for evaluating high-$\kappa$ gate dielectric devices.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.5
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• pp.203-210
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• 2003

This paper describes high voltage and high energy density capacitor developed for pulsed power applications. The rated voltage of the developed capacitor is DC 22 [kV], the capacitance is 206 [$\mu$F] and the energy density is about 0.7 [kJ/kg]. Polypropylene film and kraft paper were used as the dielectrics. The ratio of the thickness of each dielectric material which consists of the composite dielectric structure, stacking factor and the termination method were determined by the charging and discharging tests on model capacitors. In terms of energy density, the developed capacitor has higher energy density compared with the products of foreign leading companies. In addition, it has been proved that the life expectancy can be more over 2000 shots through the charging and discharging test. The voltage reversal factor was 20%. This capacitor can be used as numerous discharge applications such as military, medical, industrial fields.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.37-41
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• 2012

The wafer level stacking with Cu-to-Cu bonding becomes an important technology for high density DRAM stacking, high performance logic stacking, or heterogeneous chip stacking. Cu CMP becomes one of key processes to be developed for optimized Cu bonding process. For the ultra low-k dielectrics used in the advanced logic applications, Ti barrier has been preferred due to its good compatibility with porous ultra low-K dielectrics. But since Ti is electrochemically reactive to Cu CMP slurries, it leads to a new challenge to Cu CMP. In this study Ti barrier/Cu interconnection structure has been investigated for the wafer level 3D integration. Cu CMP wafers have been fabricated by a damascene process and two types of slurry were compared. The slurry selectivity to $SiO_2$ and Ti and removal rate were measured. The effect of metal line width and metal density were evaluated.

• Journal of the Korean Ceramic Society
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• v.44 no.11
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• pp.613-617
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• 2007

The variations of physical and dielectric properties of low temperature dielectrics based on typical aluminoborosilicate glasses modified with several divalent oxides were investigated. The divalent oxides studied here included CaO, MgO, BaO, SrO and ZnO. All samples containing either 35 wt% or 45 wt% alumina filler were prepared at the same processing condition and then fired at $850^{\circ}C$ for 30 min. The resultant characteristics of fired samples depended on the choice of the divalent ion and the content of the alumina filler. Except for the ZnO modification, all other samples containing 35 wt% filler demonstrated promising densification as they exhibited reasonably high densities of 3.07-3.31 $g/cm^3$ and high shrinkages of 14.0-16.4%. Particularly, the sample containing ZnO was distinguished with large variations compared to the base sample, which can be highlighted with earlier densification and crystallization at unexpectedly low temperatures. The negative effects of the ZnO modification on densification and dielectric properties were thought to be associated with earlier crystallization potentially by influencing effective densification via viscous flow. As an optimum composition, the sample containing only CaO showed the most promising characteristics such as $k{\sim}8.05$ and $tan{\delta}{\sim}0.0018$ when 35 wt% alumina filler was used.

• Proceedings of the Materials Research Society of Korea Conference
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• 2010.05a
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• pp.17.2-17.2
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• 2010

Printed electronics is an emerging technology to realize various microelectronic devices via a cost-effective method. Here we demonstrated a high performance of p-channel and n-channel top-gate/bottom contact polymer field-effect transistors (FETs), and applications to elementary organic complementary inverter and ring oscillator circuits by inkjet processing. We could obtained high field-effect mobility more than $0.4\;cm^2/Vs$ for both of p-channel and n-channel FETs, and successfully measured inkjet-printed polymer inverters. The performance of devices highly depends on the selection of dielectrics, printing condition and device architecture. Optimized CMOS ring oscillators with p-type and n-type polymer transistors showed as high as 50 kHz operation frequency. This research was financially supported by development of next generation RFID technology for item level applications (2008-F052-01) funded by the ministry of knowledge economy (MKE).