• The Transactions of the Korean Institute of Electrical Engineers P
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• v.66 no.4
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• pp.229-235
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• 2017

Until now, a study on a ubiquitous sensor network has been mainly concentrated in the areas of sensor nodes, and as a results, technologies related with sensor node were greatly developed. Despite of many achievements on research and development for a sensor node, a ubiquitous sensor network may failed to establish the actual service environment because variety of restrictions. In order to provide a actual service using a ubiquitous sensor networks applied to many results on research and development for a sensor nodes, a study on a wired/wireless composite router must be carried out. However a study on a wired/wireless composite router is relatively very slow compared with the sensor node. In this study, developed a high-performance router platform supporting IPv6 that can provide high-speed wired/wireless interface and QoS, and it can provide the multimedia service Interlocking the wireless sensor network and the Internet network. To analysis a given network environment and to develop the appropriate hardware and software in accordance with this requirement.

• International journal of advanced smart convergence
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• v.12 no.4
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• pp.26-34
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• 2023

A high-speed data transmission system is designed for the ground inspection equipment of satellite measurement and control. Based on USB2.0, the system consists of interface chip CY7C68013A, programmable logic processing unit EP4CE30F23C8, analog/digital and digital/analog conversion units. The working principle of data transmission is analyzed, and the system software logic and hardware composition scheme are detailed. The system was utilized to output/capture and store specific data packets. The results show that the high-speed data transmission speed can reach 38MB/s, and the system is effective for satellite test requirements.

• Proceedings of the KSME Conference
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• 2007.05a
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• pp.951-956
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• 2007

This paper suggests a high-speed control method which is suitable for multi-joint robots using a real-time stand-alone controller for general-purpose. The fast processing controller consists of a PCI Interface Board and 2-axe PWM drivers. The PCI Interface Board consists of 32-channel PWM output ports, 32-channel Encoder Counters, 32-channel A/D Converters and 48-channel Digital I/O ports, and all the I/O data transmissions are completed within 1ms. And The 2-axe PWM driver can be redesigned easily in order to embed in each link. Experimental implementations show that the high-speed control method can be used for the real-time control which is essential to controlling of multi-body robots such as humanoid robots. Especially, it is efficient for realizing the model-based motion control in demand of much calculation time by the high I/O communication speed.

• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.212-214
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• 2005

The MDDI(Mobile Digital Display Interface) standard is an optimized high-speed serial interconnection technology developed by Qualcomm and supports the VESA(Video Electronics Standard Association). It increases reliability and reduces power consumption in clamshell phones by decreasing the number of wires to interconnect with the LCD display. In this paper, the MDDI host is designed using VHDL and implemented on FPGA. We demonstrates that the MDDI host is connected with S3CA460 LCD controller is designed by Samsung Electronics Co. and display a steal image to the LCD.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1379-1385
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• 2009

We propose a low-power and high-speed client receiver for a mobile display digital interface (MDDI) newly in this paper. The low-power receiver is designed such that bias currents, sink and source currents, are insensitive to variations of power supply, process, temperature, and common-mode input voltage (VCM) and is able to operate at a rate of 450Mbps or above under the conditions of a power supply range of 3.0 to 3.6Vand a temperature range of -40 to 85$^{\circ}$C. And it is confirmed by a simulation result that the current dissipation is less than 500${\mu}$A. A test chip is manufactured with the Magna chip 0.35${\mu}$m CMOS process. When a test was done, the data receiver and data recovery circuits are functioning normally.

• Proceedings of the IEEK Conference
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• 2000.06a
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• pp.73-76
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• 2000

In tendency of digitalization, we studied about the purpose of digital modem for MRI spectrometer and advantage of digital modem compared with analog one. We introduce requirements lot designing transmitter of high speed digital modem for MRl spectrometer We also introduce its top-level and mid-level architecture. The transmitter is composed of CPC-P interface block, DUC & DAC block, RF block, master clock generation block, MCU block. Especially, DUC and its control parts are studied in detail. DUC and DAC can operate up to 52MHz and 100Msps, respectively. However we uses 35MHz as master clock and this paper shows its validity through simulations.

• Journal of Advanced Marine Engineering and Technology
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• v.27 no.3
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• pp.412-420
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• 2003

This study describes the merits of PWM control of hydraulic system using high speed on-off valves. Generally, Electro-hydraulic valves can be classified into two classification: valves which are controlled by analog signal and which are controlled by digital. The former includes hydraulic servo valves and proportional valves which require A/D converters as interface to digital computer and too costly and sensitive to oil contamination because of complexity in structures. The latter includes high speed on-off valves which do not require A/D converters because they are normally operated in a pulse width modulation(PWM) method, and are low in price and robust to oil contamination because of their simple structures. The objectives of this study is to analyze the limit cycle which regularly appear in the position control system using 2/2way high speed on-off valves and to give a criterion for the stability of this system. The nonlinear characteristics of PWM and cylinder friction of this system are described by harmonic linearization and the effects of parameter variations to the system stability are simulated.

• Publications of The Korean Astronomical Society
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• v.22 no.3
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• pp.63-73
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• 2007

In this paper, we introduce the performance test results of digital data processing system for KVN (Korean VLBI Network). The digital data processing system for KVN consists of DAS (Data Acquisition System) and high-speed recorder which called Mark5B system. DAS system performs the digitalization of analog radio signal through ADS-1000 gigabit sampler with 1 Gsps/2-bit and process the digital filtering of digital signal. Mark5B system records the output data of DFB (Digital Filter Bank) with about 1 Gbps. In this paper, we carried out the preliminary evaluation experiments of the KVN digital data processing system connected between DAS system and Mark5B with VSI (VLBI Standard Interface) interface which is designed for compatible in each VLBI system. We first performed all of the KVN digital data processing system connected by VSI interface in the world. In factory inspection phase, we found that the DAS system has a memory read/write error in DSM (Digital Spectrometer) by analyzing the recorded data in Mark5B system. We confirmed that the DSM memory error has been correctly solved by comparing DSM results with Mark5B results. The effectiveness of KVN digital data processing system has been verified through the preliminary experiments such as data transmission, recording with VSI interface connection and data analysis between DSM and Mark5B system. In future work, we will perform the real astronomical observation by using the KVN 21m radio telescopes so as to verify its stability and performance.

• Proceedings of the KSR Conference
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• 2002.10b
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• pp.995-1000
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• 2002

This paper presents general concept of DC switch gear(DCSWGR). Normally, DCSWGR consist of Digital protection unit(DPU), High Speed Circuit Breaker(HSCB), Disconnect Switch (DS), Programmable Logic Control(PLC), Auxiliary Relays and etc. Most of the components has its special characteristics and their interface between each others are various and complex. In this paper every constituent general design are preceded and interface between each component are examined. And also DCSWGR operation logic with logical diagram including interlock signal are introduced.

• Proceedings of the KSME Conference
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• 2001.06a
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• pp.102-107
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• 2001

Interfacial cracks between an isotropic and orthotropic material, subjected to static far field tensile loading are analyzed using the technique of photoelasticity. The fracture parameters are extracted from the full-field isochromatic data and the same are compared with that obtained using boundary collocation method. Dynamic Photoelasticity combined with high-speed digital photography is employed for capturing the isochromatics in the case of propagating interfacial cracks. The normalized stress intensity factors for static crack is greater when $\alpha=90^{\circ}C$ (fibers perpendicular to the interface) than when $\alpha=0^{\circ}C$ (fiber parallel to the interface) and those when $\alpha=90^{\circ}C$ are similar to ones of isotropic material. The dynamic stress intensity factors for interfacial propagating crack are greater when $\alpha=0^{\circ}C$ than $\alpha=90^{\circ}C$. The relationship between complex dynamic stress intensity factor $|K_D|$ and crack speed C is similar to that for isotropic homogeneous materials, the rate of increase of energy release rate G or $|K_D|$ with crack speed is not as drastic as that reported for homogeneous materials.