• Title/Summary/Keyword: High voltage gain

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A Soft Switching Boost Converter with High Voltage Gain Using a Single Switch (높은 승압비를 가진 공진형 소프트 스위칭 부스트 컨버터)

  • Park, Kun-Wook;Jung, Doo-Yong;Lee, Su-Won;Jung, Yong-Chae;Won, Chung-Yuen;Seo, Kwang-Duck
    • Proceedings of the KIPE Conference
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    • 2009.11a
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    • pp.173-175
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    • 2009
  • A dc/dc converter for low voltage of battery application and fuel cell system is required to step up and regulate the low and widely variable voltage. In this paper, we have proposed a soft switching boost converter with high voltage gain using a single switch. Through the theoretical analysis and experimental result, operation modes and characteristics of the proposed topology is verified.

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Novel High Step-Up DC/DC Converter Structure Using a Coupled Inductor with Minimal Voltage Stress on the Main Switch

  • Moradzadeh, Majid;Hamkari, Sajjad;Zamiri, Elyas;Barzegarkhoo, Reza
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2005-2015
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    • 2016
  • A high-step-up DC/DC converter for renewable energy systems is proposed. The proposed structure provides high voltage gain by using a coupled inductor without the need for high duty cycles and high turn ratios. The voltage gain is increased through capacitor-charging techniques. In the proposed converter, the energy of the leakage inductors of the coupled inductor is reused. This feature reduces the stress on the switch. Therefore, a switch with low ON-state resistance can be used in the proposed converter to reduce losses and increase efficiency. The main switch is placed in series with the source. Therefore, the converter can control the energy flow from the source to the load. The operating principle is discussed in detail, and a steady state analysis of the proposed converter is conducted. The performance of the proposed converter is verified by experimental results.

Enhanced Dynamic Response of SRF-PLL System for High Dynamic Performance during Voltage Disturbance

  • Choi, Hyeong-Jin;Song, Seung-Ho;Jeong, Seung-Gi;Choi, Ju-Yeop;Choy, Ick
    • Journal of Power Electronics
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    • v.11 no.3
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    • pp.369-374
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    • 2011
  • Usually, a LPF (low pass filter) is used in the feedback loop of a SRF (synchronous reference frame) - PLL (phase locked loop) system because the measured grid voltage contains harmonic distortions and sensor noises. In this paper, it is shown that the cut-off frequency of the LPF should be designed to suppress the harmonic ripples contained in the measured voltage. Also, a new design method for the loop gain of the PI-type controller in the SRF-PLL is proposed with consideration of the dynamics of the LPF. As a result, a better transient response can be obtained with the proposed design method. The LPF frequency and the PI controller gain are designed in coordination according to the steady state and dynamic performance requirements. Furthermore, in the proposed method, the controller gain and the LPF cut-off frequency are changed from their normal value to a transient value when a voltage disturbance is detected. This paper shows the feasibility and usefulness of the proposed methods through the computer simulations and experimental results.

Design and Realization of High Voltage Operational Amplifier (고전압 연산 증폭기의 설계 및 구현)

  • Kim, Kee-Eun;Jung, Hea-Yong;Cho, Jae-Han;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.517-520
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    • 2002
  • This paper has been studied Operational Amplification Circuit that has high power specification of 90 W is designed. In the input differential amplifier stage, the current source for circuit bias is designed to protect device from high voltage source. the criving state has the voltage gain more than input differential stage. With temperature compensation design, output stage works stable in different to temperature.

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Design of High Gain Low Noise Amplifier (2.4GHz 고이득 저잡음 증폭기 설계)

  • 손주호;최석우;윤창훈;김동용
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.309-312
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    • 2002
  • In this paper, we discuss the design of high gain low noise amplifier by using the 0.2sum CMOS technology. A cascode inverter is adopted to implement the low noise amplifier. The proposed cascode inverter LNA is one stage amplifier with a voltage reference and without choke inductors. The designed 2.4GHz LNA achieves a power gain of 25dB, a noise figure of 2.2dB, and power consumption of 255㎽ at 2.5V power supply.

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LCD Backlight Drive Using The Piezoelectric Transformer (압전변압기를 이용한 LCD Backlight 구동)

  • 임성운;최연호;원철호;구본호;김이국
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.17 no.2
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    • pp.28-33
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    • 2003
  • The piezoelectric transformer converters electrical energy into mechanical energy, It is high efficiency and small size transformer for high output voltage. The piezoelectric transformer operates the resonance frequency and the output voltage waveform is close to sine wave. Therefore, it is suitable for driving the LCD backlight in the notebook computer. In this paper, we discussed about the inverter which os driving piezoelectric transformer by generating sine wave through LC resonance after converting input DC voltage to the gate signal of FET. As the result of experiments, it was showed that the resonance frequency and voltage gain of the piezoelectric transformer was proportional to the load variation, and voltage gain was independent of the input voltage variation.

A High Swing Range, High Bandwidth CMOS PGA and ADC for IF QPSK Receiver Using 1.8V Supply

  • Lee, Woo-Yol;Lim, Jong-Chul;Park, Hee-Won;Hong, Kuk-Tae;Lee, Hyeong-Soo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.4
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    • pp.276-281
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    • 2005
  • This paper presents a low voltage operating IF QPSK receiver block which is consisted of programmable gain amplifier (PGA) and analog to digital converter. This PGA has 6 bit control and 250MHz bandwidth, $0{\sim}20\;dB$ gain range. Using the proposed PGA architecture (low distortion gain control switch block), we can process the continuous fully differential $0.2{\sim}2.5Vpp$ input/output range and 44MHz carrier with 2 MHz bandwidth signal at 1.8V supply voltage. Using the sub-sampling technique (input freq. is $44{\sim}46MHz$, sampling freq. is 25MHz), we can process the IF QPSK signal ($44{\sim}46MHz$) which is the output of the 6 bit PGA. We can get the SNDR 35dB, which is the result of PGA and ADC at full gain mode. We fabricated the PGA and ADC and the digital signal processing block of the IF QPSK with the 0.18um CMOS MIM process 1.8V Supply.

The performance degradation of a folded-cascode CMOS op-amp due to hot-carrier effects (Hot-Carrier 현상에 의한 Folded-Cascode CMOS OP-Amp의 성능 저하)

  • 김현중;유종근;정운달;박종태
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.34D no.12
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    • pp.39-45
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    • 1997
  • This study presents the first experimental data for the impact of hot-carrier degradtion on the performance of CMOS folded-cascode op-amps. A folded-cascode op-amp which has an NMOS input pair has been designed and fabricated using a 0.8.mu.m single-poly, double-metal CMOS process. After high voltage stress, the degradtion of perfomrance parameters such as open-metal CMOS process. After high voltage stress, the degradation of performance parameters such as open-loop voltage gain, unity-gain frequency and phase margin has been analized and physically explaniend in terms of hot carrier degradation.

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A Non-isolated DC-DC Converter with High Step-up Ratio and Wide ZVS Range (고승압비와 넓은 ZVS 영역을 갖는 비절연 DC-DC 컨버터)

  • Park, Sung-Sik;Choi, Se-Wan;Choi, Woo-Jin;Lee, Kyo-Beum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.4
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    • pp.315-322
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    • 2009
  • In the conventional boost converter, the actual duty cycle is limited as the output voltage increases due to increased voltage and current stress of the switch and diode and voltage surge caused by diode reverse recovery. In this paper a new non-isolated boost converter suitable for high gain applications is proposed. The proposed converter has voltage gain of around 6 when the duty cycle is 0.5. Since ZVS is achieved under CCM, the proposed converter has wide ZVS range. Also, voltage ratings of switch and diode are the same as one third of output voltage, and ratings of input and output passive components are reduced due to the interleaving. In addition voltage surge caused by diode reverse recovery is negligible due to ZCS turn-off of diodes. Operating principle of the proposed converter is described and validated through theoretical analysis, simulation and experiment.

Design of High-Gain OP AMP Input Stage Using GaAs MESFETs (갈륨비소 MESFET를 이용한 고이득 연산 증폭기의 입력단 설계)

  • 김학선;김은노;이형재
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.1
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    • pp.68-79
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    • 1992
  • In the high speed analog system satellite communication system, video signal processing and optical fiber interface circuits, GaAs high gain operational amplifier is advantageous due to obtain a high gain because of its low transconductance and other drawbacks, such as low frequency dispersion and process variation. Therefore in this paper, a circuit techniques for improving the voltage gain for GaAs MESFET amplifier is presented. Also, various types of existing current mirror and current mirror proposed are compared.To obtain the high differential gain, bootstrap gain enhancement technique is used and common mode feedback is employed in differential amplifier.The simulation results show that gain is higher than that of basic amplifier about 18.6dB, and stability and frequency performance of differential amplifier are much improved.

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