• 한국진공학회지
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• 제12권3호
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• pp.168-173
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• 2003

유리 기판 위에 증착된 비정질 실리콘 박막의 고상 결정화에 대한 새로운 방법을 제시하였다. 비정질 실리콘 박막의 하부에 패턴 된 다양한 크기의 $TiSi_2$ 박막을 전기저항 가열 방식으로 가열함으로서 비정질 실리콘이 고상 결정화 되도록 하였다. 박막히터를 이용한 열처리는 매우 빠른 열처리 공정으로써, 일반적인 로에 의한 열처리에 비해 매우 낮은 thermal budget을 가지므로, 유리기판 위에서도 고온 열처리가 가능하다는 장점을 가진다. 본 연구에서는 500 $\AA$의 비정질 실리콘 박막을 약 $850^{\circ}C$ 이상의 높은 온도에서 수 초 내에 결정화 할 수 있음을 보였으며, 열처리 조건의 변화에 따른 영향과 지역선택성의 장점을 보였다.

• 한국표면공학회지
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• 제48권1호
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• pp.7-10
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• 2015

Recently, oxide TFTs has attracted a lot of interests due to their outstanding properties such as excellent environmental stability, high mobility, wide-band gap energy and high transparency, and investigated through the method using vacuum system and wet solution. In the case of the method using wet solution, process is very simple, however, annealing process should be included. In this study, to overcome the problem of annealing process, atmospheric pressure plasma was used for annealing, and the electrical characteristics such as on/off ration and mobility of device were investigated.

• 반도체디스플레이기술학회지
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• 제7권3호
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• pp.51-54
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• 2008

In this study, we investigated variations in undoped ZnO thin film properties with working pressure, $O_2$/Ar ratio, and annealing ambient. Higher vacuum pressure during deposition was observed to bring about slower growth rate resulting in samples with better crystallinity as well as hole generation efficiency through formation of shallower oxygen interstitial. Given that $O_2$/Ar ratio is greater than unity, O provided from the ambient to ZnO during annealing was found to preferably situate at interstitial sites. When He was used for the second annealing, significant changes were not observed. On the other hand, O ambient caused increased density of oxygen interstitial, thereby making the film more intrinsic-like high resistivity ZnO.

• Journal of Korean Vacuum Science & Technology
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• 제2권2호
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• pp.97-100
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• 1998

We have investigated the effects of crystalline activation on solid phase crystallization (SPC) of amorphous silicon (a-Si) thin films. Wet blasting and self ion implantation were employed as the activation treatments to induce macro or micro crystalline damages on deposited a-Si films. Low temperature and larger grain crystallization were obtained by the applied two-step activation. High degree of crystallinity was also observed on both furnace and rapid SPC. crystalline activations showed the promotion of nucleation on the activated regions and the retardation of growth in an amorphous matrix in SPC. The observed behavior of two-step SPC was strongly dependent on the applied activation and annealing processes. It was also found that the diversified effects by macro and micro activations on the SPC were virtually diminished as the annealing temperature increased.

• 한국진공학회지
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• 제21권3호
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• pp.136-141
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• 2012

열처리 공정으로 제조한 $In_2Se_3$ 박막의 구조 및 광학적 물성을 조사하여 보고한다. 기판위에 스퍼터링 방법으로 인듐(In: indium)을 증착하고 셀레늄 분위기에서 열처리 온도를 변화시키며 In-Se 박막을 제조하였다. 열처리 온도가 증가함에 따라 $In_2Se_3$ 박막의 형성과 상의 변화를 관찰 할 수 있었다. 낮은 열처리 온도(${\leq}150^{\circ}C$)에서는 In의 뭉침 현상을 관찰할 수 있었고 열처리 온도가 $250^{\circ}C$ 부터 $In_2Se_3$ 박막이 형성되며 $350^{\circ}C$ 에서 ${\gamma}-In_2Se_3$ 상이 형성됨을 알 수 있었다. 열처리 온도가 $400^{\circ}C$로 증가면 wurtzite 구조의 고품질 ${\gamma}-In_2Se_3$ 박막을 얻을 수 있었다. 열처리 온도가 증가함에 따라 $In_2Se_3$ 박막의 밴드갭이 증가함을 알 수 있었고, 열처리 온도 $400^{\circ}C$에서 제조된 ${\gamma}-In_2Se_3$ 결정질 박막의 밴드갭이 1.796eV임을 알았다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.134-134
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• 2011

High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

• 한국진공학회지
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• 제10권2호
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• pp.219-224
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• 2001

N형 InGaAs에 대한 Pd/Ge/Ti/Pt 오믹 접촉 특성을 조사하였다. $450^{\circ}C$까지의 급속 열처리에 의해 우수한 오믹 특성을 나타내어 $400^{\circ}C$, 10초의 급속 열처리 조건에서 최저 $3.7\times10^{-6}\; \Omega\textrm{cm}^2$ 의 접촉 비저항을 나타내었다. 이는 열처리에 의해 생성된 Pd-Ge계 화합물의 형성 및 Ge의 InGaAs 표면으로의 확산과 관련이 있었다. 그러나 열처리 시간을 연장할 경우 접촉 비저항이 $low-10^5\; \Omega\textrm{cm}^2$로 약간 증가하였다. 고온 열처리 후에도 오믹 재료와 InGaAs의 평활한 계면을 유지하면서 우수한 오믹 특성을 나타내어, 화합물 반도체 소자의 오믹 접촉으로 충분히 응용 가능하다고 판단된다.

• Journal of Korean Vacuum Science & Technology
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• 제6권3호
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• pp.126-132
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• 2002

The origin of image-sticking in metal-insulator-metal type thin-film diode liquid crystal displays(TFD-LCDs) is the asymmetric current-voltage(I-V) characteristic of TFD element. We developed that TFD-LCDs have reduced-image-sticking. Tantalum pentoxide(Ta$_2$O$\sub$5/) is a candidate for use in metal-insulator-metal(MIM) capacitors in switching devices for active-matrix liquid crystal displays(AM-LCDs). High quality Ta$_2$O$\sub$5/ thin films have been obtained from anodizing method. We fabricated a TFD element using Ta$_2$O$\sub$5/ films which had perfect current-voltage symmetry characteristics. We applied novel process technologies which were postannealed whole TFD element instead of conventional annealing to the fabrication. One-Time Post-Annealing(OPTA) heat treatment process was introduced to reduce the asymmetry and shift of the I-V characteristics, respectively. OPTA means that the whole layers of lower metal, insulator, and upper metal are annealed at one time. Futhermore, in this paper, we discussed the effects of top-electrode metals and annealing conditions.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.189.1-189.1
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• 2014

Lead zirconium titanate (PZT) is usually used as bulk and thin films. Due to high flexibility and piezoelectric, ferroelectric and pyroelectric properties, PZT fiber has attracted in a variety of fields such as sensor devices, non-electromechanical systems and non-volatile ferroelectric memory devices. And PZT fiber can be numerously synthesized and almost with the diameter of PZT fiber thicker than $10{\mu}m$. However, the electrospinnig method is cost effective and convenient. PZT obtained by electrospinning methodhas the diameter from sub-micro to nanometer. In this paper, the PZT/PVP nanofibers were synthesized with three precursors, lead nitrate, zirconium ethoxide and titanium isopropoxide. And the PZT nanofibers were fabricated after removal of PVP by annealing process at various temperature. The obtained PZT nanofibers were characterized by means of X-ray photoelectron spectroscopy (XPS) for chemical properties, X-ray diffraction (XRD) for crystallinity and phase, scanning electron microscopy (SEM) for morphologies. The diameter of PZT nanofibers were measured with SEM. From the SEM images, we confirmed that diameter of PZT nanofibers was hundreds of nanometers and decreased with increasing the annealing temperature. When the annealing temperature increased, the crystallinity of PZT nanofibers changed from pyrochlore to perovskite structure.

• 열처리공학회지
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• 제33권2호
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• pp.57-64
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• 2020

In the present study, we investigated whether the surface oxidation of C-bearing TWIP steel ℃curs in the air during specimen delivery from an annealing furnace to a water bath and how the microstructure and tensile properties are influenced by surface oxidation. A cold-rolled Fe-18Mn-0.6 (wt%) steel was exposed in the air for 5 s after annealing at various temperatures (750℃, 850℃ and 1000℃) for 10 min in a vacuum, and then water-quenched. For comparison, another specimen, which had been quartz-sealed in a vacuum, was annealed at 1000℃ for 10 min and immediately water-quenched without exposure to air. The 750℃ and 850℃-annealed specimens and the quartz-sealed specimen showed a γ-austenite single phase in the entire specimen due to negligible surface oxidation. However, the 1000℃-annealed specimen exhibited a dual-phase microstructure consisting of ε-martensite and γ-austenite at the sub-surface due to decarburization. Whereas the specimens without decarburization revealed high elongations of 70-80%, the decarburized specimen exhibited a low elongation of ~40%, indicating premature failure due to cracking inside the decarburized layer with ε-martensite and γ-austenite.