• Title/Summary/Keyword: High throughput

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High Throughput Radix-4 SISO Decoding Architecture with Reduced Memory Requirement

  • Byun, Wooseok;Kim, Hyeji;Kim, Ji-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.407-418
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    • 2014
  • As the high-throughput requirement in the next generation communication system increases, it becomes essential to implement high-throughput SISO (Soft-Input Soft-Output) decoder with minimal hardware resources. In this paper, we present the comparison results between cascaded radix-4 ACS (Add-Compare-Select) and LUT (Look-Up Table)-based radix-4 ACS in terms of delay, area, and power consumption. The hardware overhead incurred from the retiming technique used for high speed radix-4 ACS operation is also analyzed. According to the various analysis results, high-throughput radix-4 SISO decoding architecture based on simple path metric recovery circuit is proposed to minimize the hardware resources. The proposed architecture is implemented in 65 nm CMOS process and memory requirement and power consumption can be reduced up to 78% and 32%, respectively, while achieving high-throughput requirement.

Effective Generation of Lead Compounds by High Throughput Organic Synthesis: using Multipurpose Privileged Bezopyrans

  • Gong, Young-Dae;Seo, Jin-soo;Hwang, Jong-Yeon;Park, Ji-Yeon;Yoo, Sung-Eun
    • Proceedings of the PSK Conference
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    • 2003.10a
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    • pp.89-89
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    • 2003
  • Numerous lead compounds, based on multipurpose privileged structures, can be generated that address a variety of targets from a gene family of interest, irrespective of therapeutic area. Solid-phase organic synthesis has been emerged as a powerful technique in generating combinatorial libraries of small organic molecules useful for drug discovery. Heterocyclic compounds provide scaffolds on which pharmacophores can be arranged to yield potent and selective drugs and a variety of heterocycles have been synthesized on solid support. (omitted)

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High-throughput identification of chrysanthemum gene function and expression: An overview and an effective proposition

  • Nguyen, Toan Khac;Lim, Jin Hee
    • Journal of Plant Biotechnology
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    • v.48 no.3
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    • pp.139-147
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    • 2021
  • Since whole-genome duplication (WGD) of diploid Chrysanthemum nankingense and de novo assembly whole-genome of C. seticuspe have been obtained, they have afforded to perceive the diversity evolution and gene discovery in the improved investigation of chrysanthemum breeding. The robust tools of high-throughput identification and analysis of gene function and expression produce their vast importance in chrysanthemum genomics. However, the gigantic genome size and heterozygosity are also mentioned as the major obstacles preventing the chrysanthemum breeding practices and functional genomics analysis. Nonetheless, some of technological contemporaries provide scientific efficient and promising solutions to diminish the drawbacks and investigate the high proficient methods for generous phenotyping data obtaining and system progress in future perspectives. This review provides valuable strategies for a broad overview about the high-throughput identification, and molecular analysis of gene function and expression in chrysanthemum. We also contribute the efficient proposition about specific protocols for considering chrysanthemum genes. In further perspective, the proper high-throughput identification will continue to advance rapidly and advertise the next generation in chrysanthemum breeding.

An Analysis of Effective Throughput in Distributed Wireless Scheduling

  • Radwan, Amr
    • Journal of Korea Multimedia Society
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    • v.19 no.2
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    • pp.155-162
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    • 2016
  • Several distributed scheduling policies have been proposed with the objective of attaining the maximum throughput region or a guaranteed fraction throughput region. These policies consider only the theoretical throughput and do not account the lost in throughput due to the time complexity of implementing an algorithm in practice. Therefore, we propose a novel concept called effective throughput to characterize the actual throughput by taking into account the time complexity. Effective throughput can be viewed as the actual transmitted data without including the control message overhead. Numerical results demonstrate that in practical scheduling, time complexity significantly affects throughput. The performance of throughput degrades when the time complexity is high.

Enhanced Throughput and QoS Fairness for Two-Hop IEEE 802.16j Relay Networks

  • Kim, Sang-Won;Sung, Won-Jin;Jang, Ju-Wook
    • Journal of Communications and Networks
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    • v.13 no.1
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    • pp.32-42
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    • 2011
  • Frequency reuse among relay stations (RSs) in a down-link access zone is widely adopted for throughput enhancement in IEEE 802.16j relay networks. Since the areas covered by the RSs or the base station (BS) may overlap, some mobile stations (MSs) at the border between two neighboring transmitting stations (RS or BS) using an identical frequency band may suffer severe interference or outage. This co-channel interference within the cell degrades the quality of service (QoS) fairness among the MSs as well as the system throughput. Exclusive use of a frequency band division (orthogonal resource allocation) among RSs can solve this problem but would cause degradation of the system throughput. We observe a trade-off between system throughput and QoS fairness in the previously reported schemes based on frequency reuse. In this paper, we propose a new frequency reuse scheme that achieves high system throughput with a high fairness level in QoS, positioning our scheme far above the trade-off curve formed by previous schemes. We claim that our scheme is beneficial for applications in which a high QoS level is required even for the MSs at the border. Exploiting the features of a directional antenna in the BS, we create a new zone in the frame structure. In the new zone, the RSs can serve the subordinate MSs at the border and prone to interference. In a 3-RS topology, where the RSs are located at points $120^{\circ}$ apart from one another, the throughput and Jain fairness index are 10.64 Mbps and 0.62, respectively. On the other hand, the throughput for the previously reported overlapped and orthogonal allocation schemes is 8.22 Mbps (fairness: 0.48) and 3.99 Mbps (fairness: 0.80), respectively. For a 6-RS topology, our scheme achieves a throughput of 18.38 Mbps with a fairness of 0.68; however, previous schemes with frequency reuse factors of 1, 2, 3, and 6 achieve a throughput of 15.24 Mbps (fairness: 0.53), 12.42 Mbps (fairness: 0.71),8.84 Mbps (fairness: 0.88), and 4.57 Mbps (fairness: 0.88), respectively.

Solid-phase Synthesis of 7-Aryl-benzo[b][1,4]oxazin-3(4H)-one Derivatives on a BOMBA Resin Utilizing the Smiles Rearrangement

  • Lee, Ji-Min;Yu, Eun-Ae;Park, Joo-Yeon;Ryu, In-Ae;Shin, Dong-Soo;Gong, Young-Dae
    • Bulletin of the Korean Chemical Society
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    • v.30 no.6
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    • pp.1325-1330
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    • 2009
  • A general method has been developed for the solid phase synthesis of drug-like 7-aryl-benzo[b][1,4]oxazin-3(4H)- one derivatives 6. The method relies on a novel, microwave irradiation promoted cyclization reaction of the BOMBA resin bound, N-substituted-$\alpha$-(2-chloro-4-bromophenoxy)acetamide 3 that takes place via a Smiles rearrangement. The 7-bromobenzo[1,4]oxazine 4, produced in this process is converted to 7-aryloxazin analogs 5 by utilizing Suzuki coupling with various substituted arylboronic acids. Finally, the target 7-aryl-benzo[b][1,4]oxazin-3(4H)-ones 6 are liberated from the resin by treatment with 5% TFA. The progress of the reactions involved in this preparative route can be monitored by using ATR-FTIR spectroscopy on a single bead. The target compounds, obtained by using this five-step sequence, are produced in high yields and purities.

HTCaaS(High Throughput Computing as a Service) in Supercomputing Environment (슈퍼컴퓨팅환경에서의 대규모 계산 작업 처리 기술 연구)

  • Kim, Seok-Kyoo;Kim, Jik-Soo;Kim, Sangwan;Rho, Seungwoo;Kim, Seoyoung;Hwang, Soonwook
    • The Journal of the Korea Contents Association
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    • v.14 no.5
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    • pp.8-17
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    • 2014
  • Petascale systems(so called supercomputers) have been mainly used for supporting communication-intensive and tightly-coupled parallel computations based on message passing interfaces such as MPI(HPC: High-Performance Computing). On the other hand, computing paradigms such as High-Throughput Computing(HTC) mainly target compute-intensive (relatively low I/O requirements) applications consisting of many loosely-coupled tasks(there is no communication needed between them). In Korea, recently emerging applications from various scientific fields such as pharmaceutical domain, high-energy physics, and nuclear physics require a very large amount of computing power that cannot be supported by a single type of computing resources. In this paper, we present our HTCaaS(High-Throughput Computing as a Service) which can leverage national distributed computing resources in Korea to support these challenging HTC applications and describe the details of our system architecture, job execution scenario and case studies of various scientific applications.

Performance Analysis of LTE-R Radio Communication Systems in High Speed Train Environment (열차 고속 주행환경에서 LTE-R 무선통신시스템 성능 분석)

  • Kwon, You-Chul;Choi, Jun-Sung;Oh, Hyun-Seo;Kim, Seong-Cheol
    • The Journal of the Korea institute of electronic communication sciences
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    • v.17 no.4
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    • pp.587-594
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    • 2022
  • This paper analyzed radio link throughput performance by applying radio link simulation and test equipment because there is limit in train filed test in 420 km/h high speed environment. According to the radio performance analysis, the throughput performance is slightly degraded in QPSK and 16QAM modulation schemes. But throughput performance is highly degraded in 64QAM modulation scheme.

Design of Low Complexity and High Throughput Encoder for Structured LDPC Codes (구조적 LDPC 부호의 저복잡도 및 고속 부호화기 설계)

  • Jung, Yong-Min;Jung, Yun-Ho;Kim, Jae-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.10
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    • pp.61-69
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    • 2009
  • This paper presents the design results of a low complexity and high throughput LDPC encoder structure. In order to solve the high complexity problem of the LDPC encoder, a simplified matrix-vector multiplier is proposed instead of the conventional complex matrix-vector multiplier. The proposed encoder also adopts a partially parallel structure and performs column-wise operations in matrix-vector multiplication to achieve high throughput. Implementation results show that the proposed architecture reduces the number of logic gates and memory elements by 37.4% and 56.7%, compared with existing five-stage pipelined architecture. The proposed encoder also supports 800Mbps throughput at 40MHz clock frequency which is improved about three times more than the existing architecture.