• Proceedings of the Korea Contents Association Conference
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• 2003.11a
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• pp.347-351
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• 2003

It is important to consider not only audio/video but presentation way, in video conferencing, seminar, lecture based network communication. The method to transmit image of a chalkboard used in traditional seminar, conference, lecture are one of difficulties for remote environment since it requires techniques high-resolution transmission and talking films. In this paper we implemented real-time multimedia shared board system for shared effective multimedia presentation using connection-oriented socket of TCP. In this system, decreasing cost of related system construction, improve of data reliableness and interaction, presentation delay time be able to minimize.

• Journal of Multimedia Information System
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• v.4 no.4
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• pp.179-188
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• 2017

The Internet Video Coding (IVC) standard is due to be published by Moving Picture Experts Group (MPEG) for various Internet applications such as internet broadcast streaming. IVC aims at three things fundamentally: 1) forming IVC patents under a free of charge license, 2) reaching comparable compression performance to AVC/H.264 constrained Baseline Profile (cBP), and 3) maintaining computational complexity for feasible implementation of real-time encoding and decoding. MPEG experts have worked diligently on the intellectual property rights issues for IVC, and they reported that IVC already achieved the second goal (compression performance) and even showed comparable performance to even AVC/H.264 High Profile (HP). For the complexity issue, however, there has not been thorough analysis on IVC decoder. In this paper, we analyze the IVC decoder in view of the time complexity by evaluating running time. Through the experimental results, IVC is 3.6 times and 3.1 times more complex than AVC/H.264 cBP under constrained set (CS) 1 and CS2, respectively. Compared to AVC/H.264 HP, IVC is 2.8 times and 2.9 times slower in decoding time under CS1 and CS2, respectively. The most critical tool to be improved for lightweight IVC decoder is motion compensation process containing a resolution-adaptive interpolation filtering process.

• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.511-513
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• 1998

This paper describes a full color stereoscopic video display system using a LCD shutter. Human apprehends the world with a natural stereo vision. The left eye sees through a slightly different perspective from the right eye; proposed vision system combines two images into a single image that has stereo depth. That is, when the left image is on the screen, the left shutter opens and the right shutter closes - and vice versa. The LCD shutter channels the left image to the left eye, and the right image to the right eye. The brain then fuses the stereo pair into a single high-resolution, flicker-free 3D image. The designed vision system is a real-time system that shows stereoscopic images without the loss of image information from video cameras.

• Journal of the Korea Society of Computer and Information
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• v.24 no.1
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• pp.85-92
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• 2019

In this paper, we propose a efficient feature point extraction method that can solve the problem of performance degradation by introducing a preprocessing process when extracting feature points by utilizing the characteristics of 360-degree realistic media. 360-degree realistic media is composed of images produced by two or more cameras and this image combining process is accomplished by extracting feature points at the edges of each image and combining them into one image if they cover the same area. In this production process, however, the stitching process where images are combined into one piece can lead to the distortion of non-seamlessness. Since the realistic media of 4K-class image has higher resolution than that of a general image, the feature point extraction and matching process takes much more time than general media cases.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.55-64
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• 2006

This work proposes a calibration-free 14b 70MS/s 0.13um CMOS ADC for high-performance integrated systems such as WLAN and high-definition video systems simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs signal insensitive 3-D fully symmetric layout techniques in two MDACs for high matching accuracy without any calibration. A three-stage pipeline architecture minimizes power consumption and chip area at the target resolution and sampling rate. The input SHA with a controlled trans-conductance ratio of two amplifier stages simultaneously achieves high gain and high phase margin with gate-bootstrapped sampling switches for 14b input accuracy at the Nyquist frequency. A back-end sub-ranging flash ADC with open-loop offset cancellation and interpolation achieves 6b accuracy at 70MS/s. Low-noise current and voltage references are employed on chip with optional off-chip reference voltages. The prototype ADC implemented in a 0.13um CMOS is based on a 0.35um minimum channel length for 2.5V applications. The measured DNL and INL are within 0.65LSB and l.80LSB, respectively. The prototype ADC shows maximum SNDR and SFDR of 66dB and 81dB and a power consumption of 235mW at 70MS/s. The active die area is $3.3mm^2$.

• The KIPS Transactions:PartB
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• v.10B no.1
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• pp.95-102
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• 2003

In surveillance video system, there are many classes of images and some spatial regions are more important than other regions. The conventional compression method in this system have been compressed there full frames without classfying them depend on their important parts. To improve the accuracy of the image coding and deliver effective compression for the surveillance video system, it was necessary to separate the regions according to their importance. In this paper, we propose a new effective surveillance video image compression method. The proposed scheme defines importance based three-level region of interest block in a frame, such as background, motion object block, and the feature object block. A captured video image frame can be separated to these three different levels of block regions. And depends on the priority, each block can be modified and compressed in different resolution, compression ratio and qualify factor. Therefore, in surveillance video system, this algorithm not only reduces the image processing time and space, but also guarantees the Important image data in high quality to acquire the system's goal.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.135-141
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• 2013

In this paper, we installed three high brightness red, green, and blue LED in one socket and made one pixel unit. And we also developed the full-color display board module and control unit which can express various images such as text, graphics, video image with the combination of pixel units and a number of modules. LED display driver module have a driver circuit within the combination of the RGB pixel dot on unit area. These modules of the existing form can be high priced because of implementation a fixed resolution in specific space and installation space. To overcome these shortcomings, we developed a LED driver and LED pixel modules free in array at random pitch intervals. Display board module of this paper enabled to display smoothly video image which have many data processing quantity through dragging data speed up 36 frames per second. Also there are an effect which is provided more clear image because of improving the flickering of the existing display board.

• Journal of Broadcast Engineering
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• v.18 no.2
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• pp.271-282
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• 2013

Recently, ITU-T/VCEG and ISO/IEC MPEG have started a new joint standardization activity on video coding, called High Efficiency Video Coding (HEVC). This new standard gives significant improvement in terms of picture quality for high resolution video. The main challenge in this upcoming standard is the time complexity. In this paper we have focused on CU splitting algorithm. We have proposed a novel algorithm which can terminate the CU splitting process early based on the RD cost of the parent and current level and the motion vector value of the current CU. Experimental result shows that our proposed algorithm gives on average more than about 10% decrement in time over ECU [8] with on average 1.78% of BD loss on the original.

• Journal of Broadcast Engineering
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• v.7 no.1
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• pp.45-54
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• 2002

This paper proposes a video compression algorithm using characteristics of wavelet coefficients. The proposed algorithm can provide lowed bit rate and faster running time while guaranteeing the reconstructed image qualify by the human virtual system. In this approach, each video sequence is decomposed into a pyramid structure of subimages with various resolution to use multiresolution capability of discrete wavelet transform. Then similarities between two neighboring frames are obtained from a low-frequency subband which Includes an important information of an image and motion informations are extracted from the similarity criteria. Four legion selection filters are designed according to the similarity criteria and compression processes are carried out by encoding the coefficients In preservation legions and replacement regions of high-frequency subbands. Region selection filters classify the high-frequency subbands Into preservation regions and replacement regions based on the similarity criteria and the coefficients In replacement regions are replaced by that of a reference frame or reduced to zero according to block-based similarities between a reference frame and successive frames. Encoding is carried out by quantizing and arithmetic encoding the wavelet coefficients in preservation regions and replacement regions separately. A reference frame is updated at the bottom point If the curve of similarity rates looks like concave pattern. Simulation results show that the proposed algorithm provides high compression ratio with proper Image quality. It also outperforms the previous Milton's algorithm in an Image quality, compression ratio and running time, leading to compression ratio less than 0.2bpp. PSNR of 32 dB and running tome of 10ms for a standard video image of size 352${\times}$240 pixels.

• ETRI Journal
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• v.31 no.6
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• pp.784-794
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• 2009

We present a full HD (1080p) H.264/AVC High Profile hardware encoder based on fast motion estimation (ME). Most processing cycles are occupied with ME and use external memory access to fetch samples, which degrades the performance of the encoder. A novel approach to fast ME which uses shared multibank memory can solve these problems. The proposed pixel subsampling ME algorithm is suitable for fast motion vector searches for high-quality resolution images. The proposed algorithm achieves an 87.5% reduction of computational complexity compared with the full search algorithm in the JM reference software, while sustaining the video quality without any conspicuous PSNR loss. The usage amount of shared multibank memory between the coarse ME and fine ME blocks is 93.6%, which saves external memory access cycles and speeds up ME. It is feasible to perform the algorithm at a 270 MHz clock speed for 30 frame/s real-time full HD encoding. Its total gate count is 872k, and internal SRAM size is 41.8 kB.