• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.10
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• pp.1197-1205
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• 2014

Recently signal transmission of ultra high-definition(4K-UHD) video system is transferred as uncompressed high speed data. However, this has a limit to compose the system because EMI between separate cables of high speed interface section and skew bring distortion of the video signal and jitter. In this paper we applied V-by-One HS interface technique to transfer uncompressed high speed data. We analyzed HSD(High Speed Differential) transmission line signal integrity. Also we applied RF transmission technique instead of UHD video pattern control interface PCB design. When we measured V-by-One HS video signal of designed 4K-UHD class signal generator, We found that the transmission performance has been signal standard.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.9
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• pp.1343-1347
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• 2013

This paper presents an analysis methods for current collection quality in catenary system by means of video image based monitoring system. Arcing is the sparking at the interface point between pantograph and contact wire when the electric trains have traction current values at speed. Percentage of arcing at maximum line speed is measurable parameters for compliance with the requirements on dynamic behaviour of the interface between pantograph and contact wire in accordance with requirement of IEC and EN standards. The arc detector and video is installed on a train aim at the trailing contact strip according to the travel direction. The arc detector presented and measured verity of value such as the duration and power density of each arc and the video image is measured a image when the arc is occurred in pantograph. In this paper we analysis of video image in accordance with power density of arcing from arc detector and compared with video image and power density of arcing so as to produce quality of arcing from image.

• Journal of Broadcast Engineering
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• v.19 no.5
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• pp.726-735
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• 2014

In accordance with 4K UHD(Ultra High Definition) LCD television's higher resolution and data expansion, LCD TV had to face problems such as increasing numbers of cables and tangible skews problems among cables. The V-by-One HS is a new interface technology in the path between the image processing IC and timing control (TCON) board. The variable speed from 600 Mbps to 3.75 Gbps effectively meets the requirements of various different pixel rates. In this paper, we use the V-by-One HS interface to illustrate our proposed simulation method of frequency resonance mode and PCB design approach to model the effects of signal integrity for high speed video signal using an IBIS models.

• Proceedings of the KIEE Conference
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• 1990.11a
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• pp.439-442
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• 1990

A powerful general purpose image processing processor is developed using a high-speed DSP chip, TMS320C30. The image processing processor, compatible to the standard VME bus, is composed of VME bus interface unit, video rate image grabbing/coding unit, TMS320C30 interface unit and bank of high-speed SRAMs. The performance is evaluated experimentally with the general image processing algorithms and the results show that the developed processor is capable of high speed image processing.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2002.02a
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• pp.27-30
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• 2002

The particle velocity in superfluid helium (He II) induced by a gas dynamic shock wave impingement onto He II free surface were studied experimentally by using Schlieren visualization method with an ultra-high speed video camera. It is found form visualization results that a dark zone in the immediate vicinity of the vapor-He II interface region is formed because of the high compressibility of He II and is developed toward bulk He II with the flowing-down speed of the vapor-He II interface. The mass velocity behind a transmitted compression shock wave that is equal to the contraction speed of He II amounts to 10 m/sec, the Reynolds number of which reaches $10^{7}$. This fact suggests that the superfluid shock tube facility can be applied to an experimental facility for high Reynols number flow as an alternative to the superfluid wind tunnel.

• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.212-214
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• 2005

The MDDI(Mobile Digital Display Interface) standard is an optimized high-speed serial interconnection technology developed by Qualcomm and supports the VESA(Video Electronics Standard Association). It increases reliability and reduces power consumption in clamshell phones by decreasing the number of wires to interconnect with the LCD display. In this paper, the MDDI host is designed using VHDL and implemented on FPGA. We demonstrates that the MDDI host is connected with S3CA460 LCD controller is designed by Samsung Electronics Co. and display a steal image to the LCD.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2003.11a
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• pp.170-176
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• 2003

The pantograph for Korean High Speed Train was developed and had been evaluating by through "G7- R＆D for home grown high speed train technology". In this study, a relation in mechanical aspect between the train running speed and the current collecting performance of the pantograph is conducted.'for this study, a measuring system for current collecting performance and mechanical characteristics is developed and installed on the prototype Korean High Speed Train, and measurement is conducted while the train runs on the test track. The measuring system is composed of video monitoring system and telemetry & data processing unit. It monitors whether the hazard behavior in the pantograph is occurs or not, and measures acceleration and vertical contact force between the pan head and catenary. Through this study, evaluation of a mechanical vibration characteristics and trend of the pantograph and a interface performance of pantograph - catenary up to 200㎞/h train speed are facilitated.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.184-188
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• 2009

To interactively share High Definition (HD)-quality visualization over emerging ultra-high-speed network infrastructure, several lossless and low-delay real-time media (i.e., uncompressed HD video and audio) transport systems are being designed and prototyped. However, most of them still rely on expensive hardware components. As an effort to reduce the building cost of system, in this paper, we propose the integration of both transmitter and receiver machines into a single bi-directional transport system. After detailed bottleneck analysis and subsequent refinements of embedded software components, the proposed integration can provide Real-time Transport Protocol (RTP)-based bi-directional transport of uncompressed HD video and audio from a single machine. We also explain how to interface the Gbps-bandwidth display output of uncompressed HD media system to the networked tiled display of 10240 $\times$ 3200 super-high-resolution. Finally, to verify the feasibility of proposed integration, several prototype systems are built and evaluated by operating them in several different experiment scenarios.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.7
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• pp.1639-1645
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• 2015

In UHD high-speed video transmission system, when a signal within certain frequency region coincides electrically and structurally, the system becomes unstable because the energy is concentrated, and signal flux is interfered and distorted. For the instability, power integrity analysis should be conducted. To remove the signal distortion for MLB, using a high-frequency design technique for EMI phenomenon, EMI which radiates electromagnetic energy fluxed into power layer was analyzed considering system stabilization. In this paper, we proposed an adaptive MLB design method which minimizes high-frequency noise in MLB structure, enhances signal integrity and power integrity, and suppresses EMI. The characteristic impedance for multi-layer circuit board proposed in this study were High-Speed Video Differential Signaling(HSVDS) line width w = 0.203, line gap d = 0.203, beta layer height h = 0.145, line thickness t = 0.0175, dielectric constant ε_r = 4.3, and characteristic impedance Zdiff = 100.186Ω. When high-speed video differential signal interface board was tested with optimized parameters, the magnitude of Eye diagram output was 672mV, jittering was 6.593ps, transmission frequency was 1.322GHz, signal to noise was 29.62dB showing transmission quality improvement of 10dB compared to previous system.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.569-572
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• 2005

This paper proposed the design and implementation of a DSP platform for the various multimedia streaming. The DSP platform synchronizes with host PC to configure DSP and to transmit multimedia streaming through PCI. The suggested DSP platform decodes high-capacity video/audio data using the suggested high-speed FIFO, CPLD and memory interface. The buffer control techniques is proposed in other to avoid the under/over-run of the audio/video data during the audio/video decoding. For the DSP platform test, host PC transmits program stream(PS) that consists of the MPEG-2 video MP@ML and 5.1ch AC3 audio data (Coyote.mov file, half hour running time) to DSP platform. The DSP platform plays continuously back the high sound-quality audio and high-definition video at once.