• Title/Summary/Keyword: High Power Amplifiers

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Electrostatic Suspension System of Silicon Wafer using Relay Feedback Control (릴레이 제어법을 이용한 실리콘 웨이퍼의 정전부상에 관한 연구)

  • Lee, Sang-Uk;Jeon, Jong-Up
    • Journal of the Korean Society for Precision Engineering
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    • v.22 no.10 s.175
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    • pp.56-64
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    • 2005
  • A simple and cost-effective method for the electrostatic suspension of thin plates like silicon wafers is proposed which is based on a switched voltage control scheme. It operates according to a relay feedback control and deploys only a single high-voltage power supply that can deliver a DC voltage of positive and/or negative polarity. This method possesses the unique feature that no high-voltage amplifiers are needed which leads to a remarkable system simplification relative to conventional methods. It is shown that despite the inherent limit cycle property of the relay feedback based control, an excellent performance in vibration suppression is attained due to the presence of a relatively large squeeze film damping origination from the air between the electrodes and levitated object. Using this scheme, a 4-inch silicon wafer was levitated stably with airgap variation decreasing down to $1 {\mu}m$ at an airgap of $100{\mu}m$.

Linearity Improvement of Class E Amplifier Using Digital Predistortion (디지털 사전왜곡을 이용한 마이크로파 E급 증폭기의 선형성 개선)

  • Park, Chan-Hyuck;Koo, Kyung-Heon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.3 s.357
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    • pp.92-97
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    • 2007
  • Switching mode amplifiers have been studied widely for use at microwave frequency range, and the class E amplifier which is a type of switching mode amplifier offers very high efficiency approaching 100%. In this paper, 2.4GHz microwave class E amplifier with 66% power added efficiency (PAE) and 17.6dBm output has been linearized for use at wireless LAN transmitter, and digital predistortion technique with look up table is applied. With -3dBm input power of wireless LAN, measured output spectrum can meet the required IEEE 802.11g standard spectrum mask, and the digital predistortion output spectrum has been improved by 5dB of ACPR at 20MHz offset from center frequency.

Design of Next Generation Amplifiers Using Nanowire FETs

  • Hamedi-Hagh, Sotoudeh;Oh, Soo-Seok;Bindal, Ahmet;Park, Dae-Hee
    • Journal of Electrical Engineering and Technology
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    • v.3 no.4
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    • pp.566-570
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    • 2008
  • Vertical nanowire SGFETs(Surrounding Gate Field Effect Transistors) provide full gate control over the channel to eliminate short channel effects. This paper presents design and characterization of a differential pair amplifier using NMOS and PMOS SGFETs with a 10nm channel length and a 2nm channel radius. The amplifier dissipates $5{\mu}W$ power and provides 5THz bandwidth with a voltage gain of 16, a linear output voltage swing of 0.5V, and a distortion better than 3% from a 1.8V power supply and a 20aF capacitive load. The 2nd and 3rd order harmonic distortions of the amplifier are -40dBm and -52dBm, respectively, and the 3rd order intermodulation is -24dBm for a two-tone input signal with 10mV amplitude and 10GHz frequency spacing. All these parameters indicate that vertical nanowire surrounding gate transistors are promising candidates for the next generation high speed analog and VLSI technologies.

A Study on the 8W High Power Amplifier for VSAT at Ku-band (Ku-band의 소형 지구국용을 위한 8W 고출력 증폭기에 관한 연구)

  • 조창환;이찬주;홍의석
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.7 no.1
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    • pp.53-60
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    • 1996
  • The 8W hybrid MIC SSPA has been developed in the frequency range from 14.0 GHz to 14.5 GHz for uplink of KOREASAT's earth station. The whole system was designed of two parts with driving amplifier and high power amplifier to simplify the fabrication process. we reduced weight and volum of power amplifier through arranging the bias circuits in the same housing. The realized SSPA has a small signal gain of $26\pm1dB$within 500 MHz bandwidith, and the input and output return losses are over 7dB and 12dB respectively. The output power of 39.0 ~ 39.2dBm is achieved at the 1dB gain compression point of 14 GHz, 14.25 GHz, and 14.5 GHz. That reveals higher power than 8W of design target. The proposed SSPA manufacture techni- ques in this paper can be applied to the implementation of power amplifiers for some radars and SCPC.

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Sliding Mode Observer Driver IC Integrated Gate Driver for Sensorless Speed Control of Wide Power Range of PMSMs

  • Oh, Jimin;Kim, Minki;Heo, Sewan;Suk, Jung-Hee;Yang, Yil Suk;Park, Ki-Tae;Kim, Jinsung
    • ETRI Journal
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    • v.37 no.6
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    • pp.1176-1187
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    • 2015
  • This work proposes a highly efficient sensorless motor driver chip for various permanent-magnet synchronous motors (PMSMs) in a wide power range. The motor driver chip is composed of two important parts. The digital part is a sensorless controller consisting mainly of an angle estimation block and a speed control block. The analog part consists of a gate driver, which is able to sense the phase current of a motor. The sensorless algorithms adapted in this paper include a sliding mode observer (SMO) method that has high robust characteristics regarding parameter variations of PMSMs. Fabricated SMO chips detect back electromotive force signals. Furthermore, motor current-sensing blocks are included with a 10-bit successive approximation analog-to-digital converter and various gain current amplifiers for proper sensorless operations. Through a fabricated SMO chip, we were able to demonstrate rated powers of 32 W, 200 W, and 1,500 W.

Analog-Digital Signal Processing System Based on TMS320F28377D (TMS320F28377D 기반 아날로그-디지털 신호 처리 시스템)

  • Kim, Hyoung-Woo;Nam, Ki Gon;Choi, Joon-Young
    • IEMEK Journal of Embedded Systems and Applications
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    • v.14 no.1
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    • pp.33-41
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    • 2019
  • We propose an embedded solution to design a high-speed and high-accuracy 16bit analog-digital signal processing interface for the control systems using various external analog signals. Choosing TMS320F28377D micro controller unit (MCU) featuring high-performance processing in the 32-bit floating point operation, low power consumption, and various I/O device supports, we design and build the proposed system that supports both 16-bit analog-digital converter (ADC) interface and high precision digital-analog converter (DAC) interface. The ADC receives voltage-level differential signals from fully differential amplifiers, and the DAC communicates with MCU through 50 MHz bandwidth high-fast serial peripheral interface (SPI). We port the boot loader and device drivers to the implemented board, and construct the firmware development environment for the application programming. The performance of the entire implemented system is demonstrated by analog-digital signal processing tests, and is verified by comparing the test results with those of existing similar systems.

Dual Bias Modulator for Envelope Tracking and Average Power Tracking Modes for CMOS Power Amplifier

  • Ham, Junghyun;Jung, Haeryun;Bae, Jongsuk;Lim, Wonseob;Hwang, Keum Cheol;Lee, Kang-Yoon;Park, Cheon-Seok;Yang, Youngoo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.6
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    • pp.802-809
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    • 2014
  • This paper presents a dual-mode bias modulator (BM) for complementary metal oxide semiconductor (CMOS) power amplifiers (PAs). The BM includes a hybrid buck converter and a normal buck converter for an envelope tracking (ET) mode for high output power and for an average power tracking (APT) mode for low output power, respectively. The dual-mode BM and CMOS PA are designed using a $0.18-{\mu}m$ CMOS process for the 1.75 GHz band. For the 16-QAM LTE signal with a peak-to-average power ratio of 7.3 dB and a bandwidth of 5 MHz, the PA with the ET mode exhibited a poweradded efficiency (PAE) of 39.2%, an EVM of 4.8%, a gain of 19.0 dB, and an adjacent channel leakage power ratio of -30 dBc at an average output power of 22 dBm, while the stand-alone PA has a PAE of 8% lower at the same condition. The PA with APT mode has a PAE of 21.3%, which is an improvement of 13.4% from that of the stand-alone PA at an output power of 13 dBm.

Design and Implementation K-Band EWRG Transceiver for High-Resolution Rainfall Observation (고해상도 강수 관측을 위한 K-대역 전파강수계 송수신기 설계 및 구현)

  • Choi, Jeong-Ho;Lim, Sang-Hun;Park, Hyeong-Sam;Lee, Bae-Kyu
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.5
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    • pp.646-654
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    • 2020
  • This paper is to develop an electromagnetic wave-based sensor that can measure the spatial distribution of precipitation, and to a electromagnetic wave rain gauge (hereinafter, "EWRG") capable of simultaneously measuring rainfall, snowfall, and wind field, which are the core of heavy rain observation. Through this study, the LFM transmission and reception signals were theoretically analyzed. In addition, In order to develop a radar transceiver, LFM transceiver design and simulation were conducted. In this paper, we developed a K-BAND pulse-driven 6W SSPA(Solid State Power Amplifiers) transceiver using a small HMIC(Hybrid Microwave Integrated Circuit). It has more than 6W of output power and less than 5dB of receiving NF(Noise Figure) with short duty of 1% in high temperature environment of 65 degrees. The manufactured module emits LFM and Square Pulse waveform with the built-in waveform generator, and the receiver has more than 40dB of gain. The transceiver developed in this paper can be applied to the other small weather radar.

Design of a High Efficiency Class E Amplifier for Wireless LAN (무선 LAN용 고효율 E급 증폭기 설계)

  • Park Chan-Hyuck;Koo Kyung-Heon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.8 s.350
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    • pp.91-96
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    • 2006
  • High efficiency switching mode circuits such as class I amplifiers have been well known in the MHz frequency range. The class E amplifier is a type of switching mode amplifier offering very high efficiency approaching 100%. In this paper, the class E amplifier has been designed by using the harmonic balance method of circuit simulator. The designed amplifier is realized by using pHEMT and microstrip line, shows 66% power added efficiency (PAE) at 2.4GHz with 17.6dBm output power. With -3dBm input power of wireless LAN, measured output spec01m can meet the required IEEE 802.11g standard spectrum mask. That means the required amplifier back off of 9dB from $P_{ldB}$ to satisfy the required wireless LAN spectrum mask.

2.6 GHz GaN-HEMT Power Amplifier MMIC for LTE Small-Cell Applications

  • Lim, Wonseob;Lee, Hwiseob;Kang, Hyunuk;Lee, Wooseok;Lee, Kang-Yoon;Hwang, Keum Cheol;Yang, Youngoo;Park, Cheon-Seok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.3
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    • pp.339-345
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    • 2016
  • This paper presents a two-stage power amplifier MMIC using a $0.4{\mu}m$ GaN-HEMT process. The two-stage structure provides high gain and compact circuit size using an integrated inter-stage matching network. The size and loss of the inter-stage matching network can be reduced by including bond wires as part of the matching network. The two-stage power amplifier MMIC was fabricated with a chip size of $2.0{\times}1.9mm^2$ and was mounted on a $4{\times}4$ QFN carrier for evaluation. Using a downlink LTE signal with a PAPR of 6.5 dB and a channel bandwidth of 10 MHz for the 2.6 GHz band, the power amplifier MMIC exhibited a gain of 30 dB, a drain efficiency of 32%, and an ACLR of -31.4 dBc at an average output power of 36 dBm. Using two power amplifier MMICs for the carrier and peaking amplifiers, a Doherty power amplifier was designed and implemented. At a 6 dB back-off output power level of 39 dBm, a gain of 24.7 dB and a drain efficiency of 43.5% were achieved.