• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2012.05a
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• pp.256-256
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• 2012

SoP용 재료에 응용하기 위하여 NiCuZn 페라이트계 이용한 이종접합의 관한연구를 하였다. NiCuZn 페라이트계와 유전체의 이종접합특성은 XRD, Dilatometer, LCR meter, FE-SEM, EDS 이용하여 물리 화학적 특성을 조사하였다. NiCuZn 페라이트계는 일반적인 세라믹 제조공정을 이용하여 분말을 제조하였으며, 이종접합은 모든 시편에서 잘 진행되었으며 일부 유전체의 이온들이 페라이트 쪽으로 확산이 진행되었으며 NCZF700계는 $900^{\circ}C$ 소결 시편에서 확산이 진행되지 않은 현상이 나타났다.

• Journal of Sensor Science and Technology
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• v.33 no.2
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• pp.63-69
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• 2024

A novel method for measuring hydrogen concentration is introduced, along with its working principle and a novel detection algorithm. This configuration requires no additional reference compartment for potentiometric electrochemical measurements; therefore, it is the most suitable for measuring dissolved hydrogen in the liquid phase. The sensor's electromotive force saturates at a certain point, depending on the hydrogen concentration during the heating process of the sensor operation. This dynamic temperature scanning method provides higher sensitivity than the constant temperature measurement method.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.113-116
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• 2005

In this paper, silicon thin-film solar cells(Si- TFSC) and a-Si/c-Si heterojunction solar cells(HJ-cell) are investigated. The Si-TFSC was prepared on glass substrate by depositing $1-3{\mu}m$ thin-film silicons by glow discharge method. The $a-Si:H/{\mu}c-Si:H$ tandem solar cells on textured ZnO:A1 TCO (transparent conducting oxide) showed improved Jsc in top and bottom cells than that on $SnO_2:F$ TCO. This enhancement of jsc resulted from improved light trapping effect by front textured ZnO:A1. The a-Si/c-Si HJ-cells with simple structure without high efficiency features are suffering from low Voc and Jsc. The improvement of front nip and back interface properties by adopting high quality silicon-films at low temperature should be done both for increasing device performances and production cost.

• Journal of the Korean Vacuum Society
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• v.14 no.1
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• pp.29-34
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• 2005

The degradation of the SiGe hetero-junction bipolar transistor(HBT) properties in SiGe BiCMOS process was investigated in this paper. The SiGe HBT prepaired by SiGe BiCMOS process, unlike the conventional one, showed the degraded DC characteristics such as the decreased Early voltage, the decreased collector-emitter breakdown voltage, and the highly increased base leakage current. Also, the cutoff frequency(f/sub T/) and the maximum oscillation frequency(f/sub max/) representing the AC characteristics are reduced to below 50%. These deteriorations are originated from the change of the locations of emitter-base and collector-base junctions, which is induced by the variation of the doping profile of boron in the SiGe base due to the high-temperature source-drain annealing. In the result, the junctions pushed out of SiGe region caused the parastic barrier formation and the current gain decrease on the SiGe HBT device.

• Korean Journal of Materials Research
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• v.12 no.6
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• pp.470-475
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• 2002

The effects of the conditions of the collector formation on electrical characteristics of the packaged SiGe hetero-junction bipolar transistors (HBT) were investigated. While the DC characteristics of SiGe HBTs such as IV characteristic, forward current gain, Early voltage, and breakdown voltage were hardly changed after packaging, the AC characteristics such as $f_{\tau}\; and\; f_{max}$ were degraded severely. With the rise of the collector concentration, the break-down voltage decreased but the $f_{\tau}$ increased. Additionally, $\beta$ and $f_{\tau}$ values were kept high in the range of elevated collector current due to the increase of the critical current density for the onset of the Kirk effect. The devices As implanted before the collector deposition showed lower breakdown voltage and higher $f_{\tau}$ than the others, which seems to be originated from the As up-diffusion resulting in the thinner collector.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.2 no.2 s.3
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• pp.65-72
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• 2003

In this work a 6-stage hybrid power amplifier which can be used for the wireless communication systems for MMC(hficrowave Micro Cell) and ITS wireless communication system is designed and fabricated. Ihe power amplifier's each stages was fabricated Hetero-junction Power FET of bare chip type and an alumina substrate with $\varepsilon_{r}$=9.9 and 15-mil thickness. The measured results of power amplifier module showed 33.2$\~$36.5 dB small signal gain, 33.0$\~$34.0 dBm output power at forward frequency (17.6 GHa $\~$ 17.9 CHz) and 36.0$\~$37.0 dB small signal gain, 33.0$\~$34.5 dBm output power at reverse frequency (19.0 GHz $\~$19.2GHz).

• Journal of the Korean Vacuum Society
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• v.14 no.4
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• pp.229-237
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• 2005

The degradation phenomena in SiGe hetero-junction bipolar transistors(SiGe HBTs) induced by bias stress are investigated in this review. If SiGe HBTs are stressed over a specific time interval, the device parameters deviate from their nominal values due to the internal changes in the devices. Reverse-bias stress on emitter-base(EB) junctions causes base current increase and current gain decrease because carriers accelerated by the electrical field generate recombination centers. When forward-bias current stress is conducted at an ambient temperature above $140^{\circ}C$ , hot carriers produced by Auger recombination or avalanche multiplication induce current gain fluctuation. Mixed-mode stressing, where high emitter current and high collector-base voltage are simultaneously applied to the device, provokes base current rise as EB reverse-bias stressing does.

• Korean Journal of Materials Research
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• v.21 no.12
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• pp.666-672
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• 2011

The a-Si:H/c-Si hetero-junction (HJ) solar cells have a variety of advantages in efficiency and fabrication processes. It has already demonstrated about 23% in R&D scale and more than 20% in commercial production. In order to further reduce the fabrication cost of HJ solar cells, fabrication processes should be simplified more than conventional methods which accompany separate processes of front and rear sides of the cells. In this study, we propose a simultaneous deposition of intrinsic thin a-Si:H layers on both sides of a wafer by dual hot wire CVD (HWVCD). In this system, wafers are located between tantalum wires, and a-Si:H layers are simultaneously deposited on both sides of the wafer. By using this scheme, we can reduce the process steps and time and improve the efficiency of HJ solar cells by removing surface contamination of the wafers. We achieved about 16% efficiency in HJ solar cells incorporating intrinsic a-Si:H buffers by dual HWCVD and p/n layers by PECVD.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.2
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• pp.151-157
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• 2023

Integrating dielectric materials into LTCC is a convenient method to increase the integration density in electronic circuits. To enable co-firing of the high-k and low-k dielectric LTCC materials in a multi-material hetero-laminate, the shrinkage characteristics of both materials should be similar. Moreover, thermal expansion mismatch between materials during co-firing should be minimized. The alternating stacking of an LTCC with silica filler and that with calcium-zirconate filler was observed to examine the use of the same glass in different LTCCs to minimize the difference in shrinkage and thermal expansion coefficient. For the LTCC of silica filler with a low dielectric constant and that of calcium zirconate filler with a high dielectric constant, the amount of shrinkage was examined through a thermomechanical analysis, and the predicted appropriate fraction of each filler was applied to green sheets by tape casting. The green sheets of different fillers were alternatingly laminated to the thickness of 500 ㎛. As a result of examining the junction, it was observed through SEM that a complete bonding was achieved by constrained sintering in the structure of 'calcium zirconate 50 vol%-silica 30 vol%-calcium zirconate 50 vol%'.

• Journal of electromagnetic engineering and science
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• v.5 no.1
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• pp.8-13
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• 2005

The InGaP/GaAs hetero-junction bipolar transistor(HBT) monolithic voltage-controlled dielectric resonator oscillator(VCDRO) is first demonstrated for a Ku-band low noise block down-converter(LNB) system. The on-chip voltage control oscillator core employing base-collector(B-C) junction diodes is proposed for simpler frequency tuning and easy fabrication instead of the general off-chip varactor diodes. The fabricated VCDRO achieves a high output power of 6.45 to 5.31 dBm and a wide frequency tuning range of ]65 MHz( 1.53 $\%$) with a low phase noise of below -95dBc/Hz at 100 kHz offset and -115 dBc/Hz at ] MHz offset. A]so, the InGaP/GaAs HBT monolithic DRO with the same topology as the proposed VCDRO is fabricated to verify that the intrinsic low l/f noise of the HBT and the high Q of the DR contribute to the low phase noise performance. The fabricated DRO exhibits an output power of 1.33 dBm, and an extremely low phase noise of -109 dBc/Hz at 100 kHz and -131 dBc/Hz at ] MHz offset from the 10.75 GHz oscillation frequency.