• 제목/요약/키워드: Harmonics Elimination

검색결과 92건 처리시간 0.02초

Harmonic Elimination and Optimization of Stepped Voltage of Multilevel Inverter by Bacterial Foraging Algorithm

  • Salehi, Reza;Vahidi, Behrooz;Farokhnia, Naeem;Abedi, Mehrdad
    • Journal of Electrical Engineering and Technology
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    • 제5권4호
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    • pp.545-551
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    • 2010
  • A new family of DC to AC converters, referred to as multilevel inverter, has received much attention from industries and researchers for its high power and voltage applications. One of the conventional techniques for implementing the switching algorithm in these inverters is optimized harmonic stepped waveform (OHSW). However, the major problem in using this technique is eliminating low order harmonics by solving the nonlinear and complex equations. In this paper, a new approach called the "bacterial foraging algorithm" (BFA) is employed. This algorithm eliminates and optimizes the harmonics in a multilevel inverter. This method has higher speed, precision, and convergence power compared with the genetic algorithm (GA), a famous evolutionary algorithm. The proposed technique can be expanded in any number of levels. The purpose of optimization is to remove some low order harmonics, as well as to ensure the fundamental harmonic retained at the desired value. As a case study, a 13-level inverter is chosen. The comparison results by MATLAB software between the two optimization methods (BFA and GA) have shown the effectiveness and superiority of BFA over GA where convergence is desired to achieve global optimum.

3상 고역률 Flyback 컨버터를 이용한 전압형 인버터의 고조파 제거 (Elimination of Harmonics Voltage-fed Inverter using Flyback Converter with Three-Phase High Power Factor)

  • 서기영;권순걸;이현우;고태언;김영문;문상필;장우신
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 F
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    • pp.2695-2697
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    • 1999
  • A new three-phase voltage-fed inverter using partial resonant converter with high power factor and high efficiency is proposed. The proposed Flyback converter is constructed by using a resonant network in parallel with the switch of the conventional converter. The devices are switched zero voltage or zero current eliminating the switching loss. This paper introduces elimination of harmonics compared with conventional SPWM inverter and three-phase voltage-fed inverter using Flyback converter.

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부하설비의 고조파 저감을 위한 수동필터 설계 (Design of Passive Filter for Harmonic Elimination of the Load System)

  • 손재현;강창섭;이홍기;윤철섭
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 A
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    • pp.276-278
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    • 1997
  • The aim of this study is to design a passive filter for the elimination of harmonics. For this design, the harmonics wave generating from the six pulse rectifier was measured and its characteristics were analyzed. We also calculated the quantity of harmonic current by changing the system operational conditions. According to this field data and calculated results. we determined the elements of the passive filter. The simulation results indicate the efficiency of designed passive filter.

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보조부분 공진 회로를 이용한 삼상 PWM 인버터의 고조파 제거 (Elimination of harmonics in three-Phase PWM inverter using auxiliary partial resonant circuit)

  • 서기영;이현우;김영문;문상필
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 추계학술대회 논문집 학회본부A
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    • pp.137-140
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    • 1998
  • A new SPWM inverter using three-phase boost converter by auxiliary partial resonant with high power factor and high efficiency is proposed. The proposed boost converter is constructed by using a resonant network in parallel with the switch of the conventional boost converter. The devices are switched at zero voltage or zero current eliminating the switching loss. A new Partial resonant boost converter achieves zero-voltage switching (ZVS) or zero-current switching (ZCS) for all switch devices without increasing their voltage and current stresses. This paper introduces elimination of low-order harmonics compared with conventional SPWM inverter and SPWM inverter using three-phase boost converter by auxiliary Partial resonant.

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SHE방식을 적용한 직류전력 회생시스템의 고조파 저감에 관한 연구 (A Study on the SHE-Based Harmonic Reduction of DC Power Regenerating Systems)

  • 정우창;강경우;서영민;홍순찬
    • 전력전자학회논문지
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    • 제9권1호
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    • pp.58-64
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    • 2004
  • 본 논문에서는 직류를 전원으로 하는 지하철에서 직류모선의 잉여전력을 교류모선으로 회생할 수 있는 직류전력 회생시스템의 고조파를 저감시키는 새로운 제어기법을 제안하였다. 직류전력 회생시스템에 수정 a도통(MAC : Modified a-Conduction)방식을 적용하면 출력전압에 12k$\pm$1차의 고조파가 존재한다. 이에 반해 본 논문에서 제안하는 SHE(Selected Harmonic Elimination)에 기반을 둔 방식을 적용하면 11차 고조파와 13차 고조파가 추가로 제거된다. 또한 회생시스템의 출력단에 23차 교류필터를 설치하면 잔존하는 고조파중 최저차 고조파인 23차 고조파도 제거할 수 있다. 본 논문에서 제안한 SHE방식을 적용한 고조파 저감기법을 검증하기 위하여 축소모델을 대상으로 하여 시뮬레이션을 행하였다. 그 결과, 출력전압의 THD가 기존의 MAC방식보다 더 낮으며 제어범위에서의 THD가 0.53∼0.68(%) 범위임을 확인하였다.

인버터 고조파 저감을 위한 새로운 공간벡터 변조기법에 관한 연구 (A Study on the Novel Space Vector Based Harmonic Elimination Method of Inverter)

  • 이상택;김희준;오원석;신태현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 B
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    • pp.1236-1238
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    • 2000
  • This paper considers the problem of eliminating harmonics in the inverter output waveforms. The approach is based on the minimization of the current harmonics in the induction motor by space vector modulation method. Reference voltage is compensated with injection of controlled current harmonics which are calculated to reduce current harmonics through sampled current harmonic analyzing algorithm. The theoretical analysis is carried out using computer simulation. It is verified that proposed SVM technique could reduce current harmonic component and improve THD.

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부하설비의 고조파 저감장치 설계 (Design of harmonic reduction equipment for load system)

  • 손재현;조양행;김제홍
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 학술대회 논문집 전문대학교육위원
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    • pp.224-228
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    • 2006
  • The aim of this study is to design a passive filter for the elimination of harmonics. For this design, the harmonics wave generating from the six pulse rectifier was measured and its characteristics were analyzed. We also calculated the quantity of harmonic current by changing the system operational conditions. According to this field data and calculated results, we determined the elements of the passive filter. The simulation and experimental results indicate the efficiency of designed passive filter.

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PWM 인버터의 출력파형개선 및 전압제어에 관한 연구 (A Study on the Improvement of Output Waveform and Voltage Control in PWM Inverter)

  • 정원석;김국진;전희종;박충규
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 1990년도 추계학술발표회논문집
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    • pp.68-72
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    • 1990
  • In this paper, the technique of particul-ar harmonics elimination in three-phase PWM Inverter is discussed. And voltage control technique is derived whereby harmonics eli-mination is possible in variable voltage variable frequency three-phase I.M. The results show that experiments are in a good agreement with simulation based on the theory.

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Effects of Input Harmonics, DC Offset and Step Changes of the Fundamental Component on Single-Phase EPLL and Elimination

  • Luo, Linsong;Tian, Huixin;Wu, Fengjiang
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.1085-1092
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    • 2015
  • In this paper, the expressions of the estimated information of a single-phase enhanced phase-locked loop (EPLL), when input signal contains harmonics and a DC offset while the fundamental component takes step changes, are derived. The theoretical analysis results indicate that in the estimated information, the nth-order harmonics cause n+1th-order periodic ripples, and the DC offset causes a periodic ripple at the fundamental frequency. Step changes of the amplitude, phase angle and frequency of the fundamental component cause a transient periodic ripple at twice the frequency. These periodic ripples deteriorate the performance of the EPLL. A hybrid filter based EPLL (HF-EPLL) is proposed to eliminate these periodic ripples. A delay signal cancellation filter is set at the input of the EPLL to cancel the DC offset and even-order harmonics. A sliding Goertzel transform-based filter is introduced into the amplitude estimation loop and frequency estimation loop to eliminate the periodic ripples caused by the residual input odd-order harmonics and step change of the input fundamental component. The parameter design rules of the two filters are discussed in detail. Experimental waveforms of both the conventional EPLL and the proposed HF-EPLL are given and compared with each other to verify the theoretical analysis and advantages of the proposed HF-EPLL.

마이크로 프러세서를 이용한 인버터 전압제어와 고조파 제거에 관한 연구 (A Study on Inverter Voltage Control and harmonics Elimination Using Microprocessor)

  • Chon, Byoung-Sil;Jeong, Dong-Soo
    • 대한전기학회논문지
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    • 제36권12호
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    • pp.856-867
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    • 1987
  • Microprocessor control of power-electronic equipment offers the possibility of improvements in manufacture, realizability, maintenance and servicing, and increased control flexibility. In this paper, simple microprocessor control with a view to approximating the polynomial equations which govern the commutation angles was consisdered. The theoretical analysis of this principle which govern the commutaton of power switches in order to cancel any predetermined harmonics and vary the fundamental rms voltage of the inverter output is described. Also the spectrum and harmonics were analyzed by HP-1000 computer. Practical aspect of the realization of a voltage controller based on a microprocessor and a suitable system for variable frequency inverter were also presented. The experimental test has been carried out on a Z-80 microcomputer and a single phase transistor inverter. The various results show the feasibility of obtainintg practically a single phase and a three phase inverter waveforms, which are highly desirable in most inverter applications.

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