• Title/Summary/Keyword: Hardware module

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Systems Engineering Approach to develop the FPGA based Cyber Security Equipment for Nuclear Power Plant

  • Kim, Jun Sung;Jung, Jae Cheon
    • Journal of the Korean Society of Systems Engineering
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    • v.14 no.2
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    • pp.73-82
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    • 2018
  • In this work, a hardware based cryptographic module for the cyber security of nuclear power plant is developed using a system engineering approach. Nuclear power plants are isolated from the Internet, but as shown in the case of Iran, Man-in-the-middle attacks (MITM) could be a threat to the safety of the nuclear facilities. This FPGA-based module does not have an operating system and it provides protection as a firewall and mitigates the cyber threats. The encryption equipment consists of an encryption module, a decryption module, and interfaces for communication between modules and systems. The Advanced Encryption Standard (AES)-128, which is formally approved as top level by U.S. National Security Agency for cryptographic algorithms, is adopted. The development of the cyber security module is implemented in two main phases: reverse engineering and re-engineering. In the reverse engineering phase, the cyber security plan and system requirements are analyzed, and the AES algorithm is decomposed into functional units. In the re-engineering phase, we model the logical architecture using Vitech CORE9 software and simulate it with the Enhanced Functional Flow Block Diagram (EFFBD), which confirms the performance improvements of the hardware-based cryptographic module as compared to software based cryptography. Following this, the Hardware description language (HDL) code is developed and tested to verify the integrity of the code. Then, the developed code is implemented on the FPGA and connected to the personal computer through Recommended Standard (RS)-232 communication to perform validation of the developed component. For the future work, the developed FPGA based encryption equipment will be verified and validated in its expected operating environment by connecting it to the Advanced power reactor (APR)-1400 simulator.

Design of Cryptographic Hardware Architecture for Mobile Computing

  • Kim, Moo-Seop;Kim, Young-Sae;Cho, Hyun-Sook
    • Journal of Information Processing Systems
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    • v.5 no.4
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    • pp.187-196
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    • 2009
  • This paper presents compact cryptographic hardware architecture suitable for the Mobile Trusted Module (MTM) that requires low-area and low-power characteristics. The built-in cryptographic engine in the MTM is one of the most important circuit blocks and contributes to the performance of the whole platform because it is used as the key primitive supporting digital signature, platform integrity and command authentication. Unlike personal computers, mobile platforms have very stringent limitations with respect to available power, physical circuit area, and cost. Therefore special architecture and design methods for a compact cryptographic hardware module are required. The proposed cryptographic hardware has a chip area of 38K gates for RSA and 12.4K gates for unified SHA-1 and SHA-256 respectively on a 0.25um CMOS process. The current consumption of the proposed cryptographic hardware consumes at most 3.96mA for RSA and 2.16mA for SHA computations under the 25MHz.

Open-Source Hardware Module Application for Remote Monitoring of Disaster Prevention (재난관리 원격 모니터링용 오픈소스 하드웨어 모듈 응용)

  • Jin, Kyung-Chan;Lee, Eun-Ju;Lee, Sung-Ho
    • Journal of Sensor Science and Technology
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    • v.24 no.5
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    • pp.299-305
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    • 2015
  • Since the natural disasters such as floods, droughts, heat wave and cold wave are increasing, the need for risk management is necessary to minimize the damage with utilizing IT technology. Also, the monitoring services of disaster response type have been developed and applied. Recently, the open source hardware based on the signal of the sensor, or the monitoring studies have been carried. In this paper, by analyzing a low-cost open source hardware platform such as Beagle board, we examine the utilization of the hardware-based module for sensor monitoring.

An Effective Evolvable Hardware Design using Module Evolution (모듈진화를 이용한 효율적인 진화 하드웨어 설계)

  • 황금성;조성배
    • Journal of KIISE:Software and Applications
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    • v.31 no.10
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    • pp.1364-1373
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    • 2004
  • Recently Evolvable Hardware (EHW) is widely studied to design effective hardware circuits that can reconfigure themselves according to the environment. However, it is still difficult to apply for complicated circuits because the search space increases exponentially as the complexity of hardware increases. To remedy this problem, this paper proposes a method to evolve complex hardware with a modular approach. The comparative experiments of some digital circuits with the conventional evolutionary approach indicate that the proposed method yields from 50 times to 1,000 times faster evolution and more optimized hardware.

An Efficient Hardware Architecture of Intra Prediction and TQ/IQIT Module for H.264 Encoder

  • Suh, Ki-Bum;Park, Seong-Mo;Cho, Han-Jin
    • ETRI Journal
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    • v.27 no.5
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    • pp.511-524
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    • 2005
  • In this paper, we propose a novel hardware architecture for an intra-prediction, integer transform, quantization, inverse integer transform, inverse quantization, and mode decision module for the macroblock engine of a new video coding standard, H.264. To reduce the cycle of intra prediction, transform/quantization, and inverse quantization/inverse transform of H.264, a reduction method for cycle overhead in the case of I16MB mode is proposed. This method can process one macroblock for 927 cycles for all cases of macroblock type by processing $4{\times}4$ Hadamard transform and quantization during $16{\times}16$ prediction. This module was designed using Verilog Hardware Description Language (HDL) and operates with a 54 MHz clock using the Hynix $0.35 {\mu}m$ TLM (triple layer metal) library.

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The Design and Implementation of Open Architecture CNC Software Module by a Real-time Control (실시간 제어에 의한 개방형 CNC 소프트웨어 모듈의 설계 및 구현)

  • 이제필
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.8 no.5
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    • pp.54-62
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    • 1999
  • This paper describes the design and implementation of a PC(personal computer) based open architecture machine tool controller. The hardware of open architecture CNC has generally a motion control board on a PC for controlling a servo motor. But this paper describes open architecture hardware that consists of a PC, a counter board a DAC board and a DIO board only. This makes it easy to generate CNC software module in a hardware-independent way. The proposed open architecture CNC software runs on the MS-Windows NT. The paper describes a method of con-trolling servo motors using a real-time timer of MS-Windows NT and a commercial real-time operating system on the MS-Windows. NT. An open and reconfigurable software module is made up of an object and an API(application programming interface). Using the object and the API a new CNC system can be quickly configured to control dif-ferent machine tools. The proposed open architecture CNC system is applied to 4-axis lettering center.

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A PC-Based Open Robot Control System : PC-ORC (PC에 기반을 둔 개방형 로봇제어시스템 : PC-ORC)

  • 김점구;최경현;홍금식
    • Journal of Institute of Control, Robotics and Systems
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    • v.6 no.5
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    • pp.415-425
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    • 2000
  • An open architecture manufacturing strategy intends to integrate manufacturing components on a single platform so that a particular component can be easily added and/or replaced. Therefore, the control scheme based upon the open architecture concept is hardware-independent. In this paper, a modular and object oriented approach for a PC-based open robot control system is investigated. A standard reference model for robot systems, which consists of three modules; hardware module, operating system module, and application software module, is first proposed. Then, a PC-based Open Robot Controller(PC-ORC), which can reconfigure robot control systems in various production environments, is developed. The PC-ORC is built upon the object-oriented method, and allows an easy implementation and modification of various modules. The PC-ORC consists of basic softwares, application objects, and additional hardware device on the PC Platform. The application objects are: sequencer, computation unit, servo control, ancillary equipment, external sensor control, and so on. In order to demonstrate the applicability of the PC-ORC, the proposed PC-ORC configuration is applied to an industrial SCARA robot system.

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Design and Implementation of hardware module to process contactless protocol(Type-B) for IC card (IC카드를 위한 비접촉 프로토콜(Type-B) 처리 모듈의 설계 및 구현)

  • Jeon, Yong-Sung;Park, Ji-Mann;Ju, Hong-Il;Jun, Sung-Ik
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.481-484
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    • 2002
  • In recent, the contactless IC card is widely used in traffic, access control system and so forth. And its use becomes a general tendency more and more because of the development of RF technology and improvement of requirement for user convenience. This paper describes the hardware module to process contactless protocol for implementation contactless IC card. And the hardware module consists of specific digital logic circuits that analyze digital signal from analog circuit and then generate data & status signal for CPU, and that convert the data from CPU into digital signal for analog circuit.

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A design of High-Profile Intra Prediction module for H.264 (H.264 High-Profile Intra Prediction 모듈 설계)

  • Suh, Ki-Bum;Lee, Hye-Yoon;Lee, Yong-Ju;Kim, Ho-Eui
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.11
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    • pp.2045-2049
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    • 2008
  • In this paper, we propose an novel architecture for H.264 High Profile Encoder Intra Prediction module. This designed module can be operated in 306 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 13.2 and verified the our developed hardware using test vector generated by reference C. We adopt plan removal and SAD calculation to reduce the Hardware cost and cycle. The designed circuit can be operated in 133MHz clock system, and has 250K gate counts using TSMC 0.18 um process including SRAM memory.

Efficient Design and Performance Analysis of a Hardware Right-shift Binary Modular Inversion Algorithm in GF(p)

  • Choi, Piljoo;Lee, Mun-Kyu;Kong, Jeong-Taek;Kim, Dong Kyue
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.3
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    • pp.425-437
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    • 2017
  • For efficient hardware (HW) implementation of elliptic curve cryptography (ECC), various sub-modules for the underlying finite field operations should be implemented efficiently. Among these sub-modules, modular inversion (MI) requires the most computation; therefore, its performance might be a dominant factor of the overall performance of an ECC module. To determine the most efficient MI algorithm for an HW ECC module, we implement various classes of MI algorithms and analyze their performance. In contrast to the common belief in previous research, our results show that the right-shift binary inversion (RS) algorithm performs well when implemented in hardware. In addition, we present optimization methods to reduce the area overhead and improve the speed of the RS algorithm. By applying these methods, we propose a new RS-variant that is both fast and compact. The proposed MI module is more than twice as fast as the other two classes of MI: shifting Euclidean (SE) and left-shift binary inversion (LS) algorithms. It consumes only 15% more area and even 5% less area than SE and LS, respectively. Finally, we show that how our new method can be applied to optimize an HW ECC module.