• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.527-528
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• 2006

In this paper, we propose an IP design and implementation of System on a chip(SoC) for Discrete Cosine Transform (DCT) and Discrete Wavelet Transform (DWT) processor using adder-based DA(Adder-based Distributed Arithmetic). To reduced hardware cost and to improve operating speed, the combined DCT/ DWT processor used the bit-serial method and DA module. The transform of coefficient equation result in reduction in hardware cost and has a regularity in implementation. We use Verilog-HDL and Xilinx ISE for simulation and implement FPGA on SoCMaster-3.

• Proceedings of the IEEK Conference
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• 2002.06a
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• pp.283-286
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• 2002

For the satisfying performance of a oil lubricator, design of a oil controller for the system which meets the required specifications and its supporting hardware that keep their functioning is important. Among the hardware of a control system, oil system are most vulnerable to malfunction. Thus it is necessary to keep track of accurate and reliable oil readings for good fusion oil lubricator performance. In case of oil lubricator ,data loss, ssr trigger error faults, they are detected by examining the data system output values and the major values of the system, and then the faults are recognized by the analysis of symptoms of faults. If necessary electronic -sensor values are synthesized according to the types of faults, and then they are used for the controller instead of the raw data. In this paper, a fast-32bit cpu micorprocessor applied to the control of flexible link system with the sensor fault problems in the error module fer exact positioning to show the applicability. It is shown that the fusion oil lubricator can provide a satisfactory loop performance even when the sensor faults occure

• Journal of IKEEE
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• v.14 no.2
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• pp.76-81
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• 2010

The need for dedicated hardware continue to decrease as the mobile CPU's performance increases. But, there is a limit to a mobile CPU's performance. GP-GPU(General-Purpose computing on Graphics Processing Units) can improve performance without adding other dedicated hardware. This paper presents the implementation of Inverse Quantization, Inverse DCT and Color Space Conversion module in H.264/AVC decoder using GP-GPU for a mobile environments. The proposed architecture improves approximately 40% of performance when it use all the features.

• IEMEK Journal of Embedded Systems and Applications
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• v.16 no.6
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• pp.253-258
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• 2021

In this paper, we developed a hardware and software platform of the real-time data logging system to verify radar FEM (Front-end Module) and signal-processing algorithms. We developed a hardware platform based on FPGA (Field Programmable Gate Array) and DSP (Digital Signal Processor) and implemented firmware software to verify the various FEMs. Moreover, we designed PC based software platform to control radar logging parameters and save radar data. The developed platform was verified using 24 GHz multiple channel FMCW (Frequency Modulated Continuous Wave) in an environment of stationary and moving targets of chamber room.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.94-97
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• 2002

A VLSI architecture of an Ogg Vorbis decoder is proposed : which is dedicated to portable audio appliances. Referring to the computational cost analysis of the decoding processes, the LSP (Line Spectrum Pair) process, which takes more than 50% of the total processing time, can be regarded as a bottleneck to achieve realtime processing by embedded Processors. Thus in our decoder a specific hardware architecture is devised for the LSP process so as to be integrated into a single chip together with an ARM7TDMI processor. In addition, in order to reduce the total hardware cost, instead of the floating point arithmetic, the fixed point arithmetic is adopted. The LSP module has been implemented with 9,740 gates by using a Virtual Silicon 0.l5$\mu\textrm{m}$ CMOS technology, which operates at 58.8MHz with the total CPU load reduced by 57%. It is also verified that the use of the fixed point arithmetic does not incur any significant sound distortion.

• Journal of the Korea Computer Industry Society
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• v.2 no.2
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• pp.211-218
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• 2001

In this paper, we propose the structure of utilizing the memory map, which is using not conventional DRAM but SDRAM, for the hardware implementation of frame memory interface module to the video encoder. As reducing the size of memory map and interface buffer within the same bus, the hardware complexity is improved and the hardware size is minimized as simplifying the interface logic. The conventional system is wasted access time, because of accessing randomly stored data in order to store and output the memories in macro-block unit. therefore the method, which is proposed in this paper, can be effectively reducing the access time of memory, because of the data is stored and processed by line unit.

• Journal of the Institute of Convergence Signal Processing
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• v.2 no.1
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• pp.113-118
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• 2001

In this paper, we implement modules of the MPEG-2 AAC decoder using VHDL. Tools of Huffman decoder, inverse quantizer and high-density filter bank which are necessary for the AAC decoder. We designed the high speed Huffman decoder using the method of octal tree search algorithm, and reduced computational time of filter bank using IFFT. Also, we use table of computation result for an exponential calculation of Inverse quantizer in fixed-point hardware, and reduced the size of table using linear interpolation. Modules implemented by hardware through optimization work in real time at low clock frequency are possible to reduce the system size.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.742-745
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• 2004

If a personal robot is popularized like a personal computer in the future, many kinds of robots will appear and the number of manufacturers will increase as a matter of course. In such circumstances, it can be inefficient, in case each manufacturer makes a whole platform individually. The solutions for this problem are to modularize a robot component (hardware and software) functionally and to standardize each module. Each module is developed and sold by each special maker and a consumer purchases desired modules and integrates them. The standardization of a module includes the unification of electrical and mechanical interface. In this paper, the standard interfaces of modules are proposed and CMR(Component Modularized Robot)-P2 made with the modules(brain, sensor, mobile, arm) is introduced. In order to simplify and to make the modules light, a frame is used for supporting a robot and communication/power lines. The name of a method and the way to use that are defined dependently on the standard interfaces in order to use a module in other modules. Each module consists of a distributed object and that can be implemented in the random language and platform. The sensor, mobile and arm modules are developed on Pentium or ARM CPU and embedded Linux OS using the C programming language. The brain module is developed on Pentium CPU and Windows OS using the C, C++ and RPL(Robot Programming Language). Also tasks like pass planning, localization, moving, object perception and face perception are developed. In our test, modules got into gear and CMR-P2 executed various scenarios like guidance, errand and guarding completely.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.9
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• pp.1993-1998
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• 2010

This paper presents an integrated control module for controlling transportation machine and automatic navigation using a combined technology of mobile telematics and transportation machine telematics, i.e. Mobile In Vehicle (MIV). This development includes hardware implementation and its verification of control mechanism applied to vehicle. In particular, the module is designed to be versatile in such a way that it can collect various information and facilitate various options for convenience by supporting existing networks, such as TCP/IP, Wi-Fi and 3G mobile radio networks. The study offers its versatility, intelligence and cost-effectiveness by enabling the module to support network-independent service, whereas conventional modules operate only in a certain network. Based on this module, a multiple of subsequent convenient functions for transportation machine can further be developed for safe and intelligent transportation machines.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.4
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• pp.79-91
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• 2008

Modern society as an information society, a lot of information is communicated in on-line. Specially, mobile environment based on radio communication has a characteristic of flexibility compared with wire communication and is developed rapidly. However, the more mobile technology is developed the more security for sensitive information is needed. Therefore, MTM(Mobile Trusted Module) is developed and promoted by TCG(Trusted Computing Group), which is an industry standard body to enhance the security level in the mobile computing environment. MTM, hardware security module for mobile environment, offers user's privacy protection, platform integrity verification, and individual platform attestation. On the other hand, secure migration scheme is required in case secret data or key is transferred from one platform to the other platform. In this paper, we analyze migration schemes which were described in TCG standard and other papers and then propose security maintenance scheme for secret data using USIM(Universal Subscriber Identity Module).