• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.5
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• pp.1089-1094
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• 2013

In this study, we propose how th implement a MDDI(Mobile Display Digital Interface) protocol packet generation method in software. MDDI protocol is widely used in mobile display device. MDDI protocol packets are generated by software within micro processor. This method needs the minimum hardware configuration. In order to implementation of this method, we design a hardware platform with a high performance microprocessor and a FPGA. The packets generated by software within microprocessor are converted into LVDS signals, and transmitted by hardware within FPGA. This study suggests the benefits of the way how software can easily create a variety of packet. But, this proposed method takes more time in packet transmission compared to the traditional method. This weakness remains as a future challenge, which can be soon improved.

• Journal of the Korean Institute of Intelligent Systems
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• v.11 no.5
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• pp.426-432
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• 2001

This paper is implementation of cellular automata neural network system using evolving hardware concept. This system is a living creatures'brain based on artificial life techniques. Cellular automata neural network system is based on the development and the evolution, in other words, it is modeled on the ontogeny and phylogney of natural living things. The phylogenetic mechanism are fundamentally non-deterministic, with the mutation and recombination rate providing a major source of diversity. Ontogeny is deterministic and local physics. Cellular automata is developed from initial cells, and evaluated in given environment. And genetic algorithms take a part in adaptation process. In this paper we implement this system using evolving hardware concept. Evolving hardware is reconfigurable hardware whose configuration si under the control of an evolutionary algorithm. We design genetic algorithm process for evolutionary algorithm and cells in cellular automata neural network for the construction of reconfigurable system. The effectiveness of the proposed system if verified by applying it to Exclusive-OR.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.975-977
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• 2013

Arduino is for design based on open source prototyping platform, artist, designer, hobby activists, etc, i has been designed for all those who are interested in the environment construct. Arduino adventage you can easily create applications hardware, without deep knowledge about the hardware. Configuration of arduino using AVR microcontroller ATmage 168, software to action arduino using arduino program, MATLAB, Processing. Arduino is open source base, you can hardware production directly and using shield additionally, the arduino can be combined. Processing iis open source. You can 2D, 3D, PDF output, using P3D and OpenGL graphics. Also you can check by running a stand-alone application. Through a combination of Arduino, library support, such as sound, video, and computer vision can be expanded, this program is the Android phone and iPhone programming. In this paper, sortware was used for Processing, hardware was used for arduino MegaADK board, After making easy 2axis game, using the software and hardware verification.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.5 no.3
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• pp.206-215
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• 2005

In this paper, we propose a new design method of Genetic Algorithm Processor(GAP) and Evolvable Hardware(EHW). All sorts of creature evolve its structure or shape in order to adapt itself to environments. Evolutionary Computation based on the process of natural selection not only searches the quasi-optimal solution through the evolution process, but also changes the structure to get best results. On the other hand, Genetic Algorithm(GA) is good fur finding solutions of complex optimization problems. However, it has a major drawback, which is its slow execution speed when is implemented in software of a conventional computer. Parallel processing has been one approach to overcome the speed problem of GA. In a point of view of GA, long bit string length caused the system of GA to spend much time that clear up the problem. Evolvable Hardware refers to the automation of electronic circuit design through artificial evolution, and is currently increased with the interested topic in a research domain and an engineering methodology. The studies of EHW generally use the XC6200 of Xilinx. The structure of XC6200 can configure with gate unit. Each unit has connected up, down, right and left cell. But the products can't use because had sterilized. So this paper uses Vertex-E (XCV2000E). The cell of FPGA is made up of Configuration Logic Block (CLB) and can't reconfigure with gate unit. This paper uses Vertex-E is composed of the component as cell of XC6200 cell in VertexE

• International Journal of Automotive Technology
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• v.4 no.1
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• pp.47-55
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• 2003

The Center for Transportation Research at the Argonne National Laboratory (ANL) supports the DOE by evaluating advanced automotive technologies in a systems context. ha has developed a unique set of compatible simulation tools and test equipment to perform an integrated systems analysis project from modeling through hardware testing and validation. This project utilized these capabilities to demonstrate the trade-off in fuel economy and Oxides of Nitrogen (NOx) emissions in a so-called ‘pre-transmission’ parallel hybrid powertrain. The powertrain configuration (in simulation and on the dynamometer) consists of a Compression Ignition Direct Ignition (CIDI) engine, a Continuously Variable Transmission (CVT) and an electric drive motor coupled to the CVT input shaft. The trade-off is studied in a simulated environment using PSAT with different controllers (fuzzy logic and rule based) and engine models (neural network and steady state models developed from ANL data).

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.54 no.5
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• pp.238-244
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• 2005

This paper proposes a new configuration of 36-pulse voltage source converter which consists of two 6-pulse bridges and a pulse-interleaving auxiliary circuit. The system topology of proposed converter was derived to increase the pulse number of converter output voltage without increasing the number of 6-pulse bridges. The gate pulse generation was analyzed using the theoretical approach of multi-pulse switching converter, The operational feasibility of proposed system was verified by computer simulations with PSCAD/EMTDC software and experimental works with 2kVA hardware prototype. The proposed converter can be widely used for the uninterruptible power supply, the power quality compensator, and the distributed power generation, such as solar and fuel cell power system.

• Proceedings of the KSRS Conference
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• v.2
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• pp.800-803
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• 2006

The Space-borne electro-optical camera system, like KOMPSAT has panchromatic redundant image channel as well as primary channel in order to increase reliability of satellite system. In most case redundant channel never been used during the whole mission period. Staggered array configuration using redundant image channel and new operation mode proposed which operates primary and redundant channel simultaneously. Without new hardware design, fast electronics and system complexity, we can get 1.414 times more fine GSD image of original system and aliasing effect which corrupt high frequency information of image can be minimized. To get the more efficiency from staggered array configuration, we introduce masked pixel CCD.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.616-617
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• 2010

This paper presents a model of e-learning based on ubiquitous computing configuration. The proposed e-learning model as following. we propose the e-learning system's hardware and software configurations which are server and networking systems. Also, we construct the proposed e-learning systems's services. There are attendance and absence service, class management service, common knowledge service, score processing service, facilities management service, personal management service, personal authorization issue management service, campus guide service, lecture-hall management service. Also, we propose the laboratory equipment management service, experimental materials management service etc.

• Proceedings of the KIEE Conference
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• summer
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• pp.572-574
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• 2004

The configuration of Distribution Automatic System(BAS) is dual servers and raid 5(redundant arrays of inexpensive disks) clustering dual HDD. The DAS has the distributed object-oriented architecture using middleware software(BASEstar), so the number of client nodes has no limitation. Because the DAS is scalable, it can be configured using various application programs and be upgraded easily. The DAS has competitive to export because there are system development and accumulation of technology that coincide in International Standard, using common 05 and DB. This paper describes the structure of DAS hardware and software separately and proposes to improve program to share real time DB efficiently at each node.

• Journal of Power Electronics
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• v.14 no.4
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• pp.742-753
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• 2014

In this paper, a new continuously and linearly controlled capacitive static VAR compensator is proposed for the automatic power factor correction of inductive single phase loads in 220V 50Hz power system networks. The compensator is constructed of a harmonic-suppressed TCR equipped with a new adaptive current controller. The harmonic-suppressed TCR is a new configuration that includes a thyristor controlled reactor (TCR) shunted by a passive third harmonic filter. In addition, the parallel configuration is connected to an AC source via a series first harmonic filter. The harmonic-suppressed TCR is designed so that negligible harmonic current components are injected into the AC source. The compensator is equipped with a new adaptive closed loop current controller, which responds linearly to reactive current demands. The no load operating losses of this compensator are negligible when compared to its capacitive reactive current rating. The proposed system is validated on PSpice which is very close in terms of performance to real hardware.