• Proceedings of the Korean Information Science Society Conference
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• 2005.11a
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• pp.508-510
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• 2005

동영상 압축 표준인 H.264/AVC는 압축 효율을 높이기 위해 기존의 표준과는 다른 기법들을 사용함으로 압축률은 높였지만 보다 많은 계산량을 요구한다. 제한된 자원을 가진 임베디드 환경에서는 많은 계산량은 큰 문제점이 된다. DMB를 포함한 대부분의 경우는 이를 하드웨어적으로 구현을 하고 있지만 구현비용과 업데이트의 용의를 위해서 앞으로는 소프트웨어적으로도 구현이 가능해야 할 것이다. 본 논문에서는 H.264/AVC가 임베디드 환경에서 소프트웨어로 구현을 할 경우 그에 대한 성능 명가를 수행하기 위해 실제 임베디드 장비에서 H.264/AVC 복호기와 임베디드 그래픽 라이브러리를 사용해서 재생기를 구현하였고 다양한 종류의 영상을 재생시키는 실험을 하였다. 이러한 실험을 통해 임베디드 상에서 H.264/AVC 재생기는 QCIF 화면을 초당 3프레임 정도를 재생시키는 능력을 보였다. 이는 사용자측면에서는 동영상이라고 느낄 수 없을 정도의 성능이었다. 그러므로 임베디드 환경에서 H.264로 압축된 영상을 사용할 경우에는 H.264의 프로파일이나 레벨 조정 및 프레임 넘김 기법이 필요 할 것으로 추정한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.45-53
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• 2006

In this paper, we proposed a parallel hardware architecture for deblocking filter in K264/AVC. The deblocking filter has high efficiency in H.264/AVC, but it also has high computational complexity. For real time video processing, we chose a two 1-D parallel filter architecture, and tried to reduce memory access using dual-port SRAM. The proposed architecture has been described in Verilog-HDL and synthesized on Hynix 0.25um CMOS Cell Library using Synopsys Design Compiler. The hardware size was about 27.3K logic gates (without On-chip Memory) and the maximum operating frequency was 100Mhz. It consumes 258 clocks to process one macroblock, witch means it can process 47.8 HD1080P(1920pixel* 1080pixel) frames per second. It seems that it can be used for real time H.264/AVC encoding and decoding of various multimedia applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.10
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• pp.38-48
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• 2007

The increasing demand on the use of multimedia video contents drives more mobile embedded systems to incorporate H.264/AVC decoding capability. An H.264/AVC decoder often requires high computation bandwidth during its decoding phase. Depending upon processor computation capability and multimedia contents complexity, the decoder can be implemented either in hardware or software. However, without a thorough analysis on the Performance and resource requirements, it is difficult to choose a cost-effective methodology of implementing this codec. This paper presents both hardware and software implementation of H.264/AVC decoding subsystem in mobile embedded systems, and quantitatively analyses the performance and resource requirements. It also shows the methodology to identify performance bottleneck in Linux-based mobile embedded systems, which is in turn used to select feasible and efficient implementation methodology.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.8C
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• pp.720-728
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• 2007

For the improvement of coding efficiency, the H.264/AVC video coding standard employs new coding tools compared with existing coding standards. However, due to these new coding tools, the complexity of H.2641AVC encoder is greatly increased. Specially, Inter/Intra mode decision method of H.264/AVC using RDO(rate-distortion optimization) technique is one of the most complex parts in H.264/AVC. In this paper, we focus on the complexity reduction in macroblock mode decision considering coding efficiency. From the simulation results, the proposed algorithm reduce the encoding time by maximum 80% of total, and reduce the bitrate of the overall sequences by $8{\sim}10%$ on the average compared with existing coding methods.

• Journal of Broadcast Engineering
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• v.12 no.4
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• pp.377-380
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• 2007

In this paper, an improved CABAC is proposed for the lossless compression in H.264/AVC. CABAC in the lossless coding is not as efficient as that in the lossy compression since it was developed for lossy coding. CABAC for the lossless coding in H.26과/AVC Advanced 4:4:4 Profile is applied without the change of the conventional binarization method. Thus, a binarization method considering the statistical characteristic of residual signals is proposed for the lossless coding in 0.264/AVC Advanced 4:4:4 Profile. The experimental results show that the proposed method obtains approximately 3.4% bitrate reduction in comparison to that of the conventional lossless coding.

• Journal of Broadcast Engineering
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• v.14 no.3
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• pp.271-279
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• 2009

The Moving Picture Experts Group (MPEG) and Video Coding Experts Group (VCEG) have developed a new standard that promises to outperform the earlier MPEG-4 and H.263 standards. The new standard is called H.264/AVC (Advanced Video Coding) and is published jointly as MPEG-4 Part 10 and ITU-T Recommendation H.264. In particular, the H.264/AVC intra prediction coding provides nine directional prediction modes for every $4{\times}4$ block in order to reduce spatial redundancies. In this paper, an ABS (Adaptive Bit Skip) mode is proposed. In order to achieve coding efficiency, the proposed method can remove the mode bits to represent the prediction mode by using the similarity of adjacent pixels. Experimental results show that the proposed method achieves the PSNR gain of about 0.2 dB in R-D curve and reduces the bit rates about 3.6% compared with H.264/AVC.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.3
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• pp.89-95
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• 2009

H.264/AVC is the state-of-the-art video compression standard which achieves high coding efficiency compared with the previous standards. H.264/AVC adopts zig-zag scanning in order to encode quantized transform coefficients in a block. However, its performance is not satisfactory because all blocks are scanned in the fixed order without considering the characteristics of blocks. This paper presents an adaptive coefficient scanning method for improving inter coding efficiency in H.264/AVC. In the proposed method, the coefficient scanning order for each prediction mode is adaptively controlled based on the information of previously-coded blocks. The experimental results show that the proposed coefficient scanning method improves the coding efficiency about 2.29% for high-quality HD sequences.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.6
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• pp.1104-1114
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• 2007

Digital video compression technique has played an important role that enables efficient transmission and storage of multimedia data where bandwidth and storage space are limited. The new video coding standard, H.264/AVC, developed by Joint Video Team(JVT) significantly outperforms previous standards in compression performance. Especially, variable length code(VLC) plays a crucial pun in video and image compression applications. H.264/AVC standard adopted Context-based Adaptive Variable Length Coding(CAVLC) as the entropy coding method. CAVLC of H.264/AVC requires a large number of the memory accesses. This is a serious problem for applications such as DMB and video phone service because of the considerable amount of power that is consumed in accessing the memory. In order to overcome this problem in this paper, we propose a variable length technique that implements memory-free coeff_token, level, and run_before decoding based on arithmetic operations and using only 70% of the required memory at total_zero variable length decoding.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.175-178
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• 2009

H.264/AVC is a video coding standard of ITU-T and ISO/IEC, and widely spreads its application due to its high compression ratio more than twice that of MPEG-2 and high image quality. In this paper, we explained Intra Prediction in H.264/AVC, which is able to achieve higher compressing efficiency from correlation removal of adjacent samples in spatial domain, and proposed efficient Intra Predictor architecture design for H.264/AVC decoder. The proposed system reduced computation cycle using processing element and precomputation processing element and also reduced the number of access to external memory using efficient register. We designed the proposed system with Verilog-HDL and verified with suitable test vector. The proposed Intra Predictor achieved about 60% cycle reduction comparing with existing Intra Predictors.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.723-726
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• 2008

H.264/AVC는 다양한 블록 사이즈에 따라 움직임 보상을 수행한다. 본 논문은 1/4정밀도 화소를 지원하는 효율적인 움직임 보상에 대해 연구하였다. 참조 프레임의 데이터로 사용하기 위한 메모리의 접근을 줄이고 2개의 6-tap 필터를 사용하는 움직임 보상을 제안한다. 소프트웨어 검증을 통한 최적화 된 알고리즘을 사용하여 하드웨어 설계 언어를 이용하여 기술하고 ModeSim 6.0a를 이용한 데이터 검증을 수행하였다.