• Title/Summary/Keyword: H-gate

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Fabrication of Organic Thin Film Transistor(OTFT) for Flexible Display by using Microcontact Printing Process (미세접촉프린팅공정을 이용한 플렉시블 디스플레이 유기박막구동소자 제작)

  • Kim K.Y.;Jo Jeong-Dai;Kim D.S.;Lee J.H.;Lee E.S.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2006.05a
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    • pp.595-596
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    • 2006
  • The flexible organic thin film transistor (OTFT) array to use as a switching device for an organic light emitting diode (OLED) was designed and fabricated in the microcontact printing and low-temperature processes. The gate, source, and drain electrode patterns of OTFT were fabricated by microcontact printing which is high-resolution lithography technology using polydimethylsiloxane(PDMS) stamp. The OTFT array with dielectric layer and organic active semiconductor layers formed at room temperature or at a temperature tower than $40^{\circ}C$. The microcontact printing process using SAM(self-assembled monolayer) and PDMS stamp made it possible to fabricate OTFT arrays with channel lengths down to even nano size, and reduced the procedure by 10 steps compared with photolithography. Since the process was done in low temperature, there was no pattern transformation and bending problem appeared. It was possible to increase close packing of molecules by SAM, to improve electric field mobility, to decrease contact resistance, and to reduce threshold voltage by using a big dielecric.

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Electrical characteristics of high-k stack layered tunnel barriers with Post-Rapid thermal Annealing (PRA) for nonvolatile memory application

  • Hwang, Yeong-Hyeon;Yu, Hui-Uk;Son, Jeong-U;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.186-186
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    • 2010
  • 소자의 축소화에 따라 floating gate 형의 flash 메모리 소자는 얇은 게이트 절연막 등의 이유로, 이웃 셀 간의 커플링 및 게이트 누설 전류와 같은 문제점을 지니고 있다. 이러한 문제점을 극복하기 위해 charge trap flash 메모리 (CTF) 소자가 연구되고 있지만, CTF 메모리 소자는 쓰기/지우기 속도와 데이터 보존 성능간의 trade-off 관계와 같은 문제점을 지니고 있다. 최근, 이를 극복하기 위한 방안으로, 다른 유전율을 갖는 유전체들을 적층시킨 터널 절연막을 이용한 Tunnel Barrier Engineered (TBE) 기술이 주목 받고 있다. 따라서, 본 논문에서는 TBE 기술을 적용한 MIS-capacitor를 높은 유전율을 가지는 Al2O3와 HfO2를 이용하여 제작하였다. 이를 위해 먼저 Si 기판 위에 Al2O3 /HfO2 /Al2O3 (AHA)를 Atomic Layer Deposition (ALD) 방법으로 약 2/1/3 nm의 두께를 가지도록 증착 하였고, Aluminum을 150 nm 증착 하여 게이트 전극으로 이용하였다. Capacitance-Voltage와 Current-Voltage 특성을 측정, 분석함으로써, AHA 구조를 가지는 터널 절연막의 전기적인 특성을 확인 하였다. 또한, high-k 물질을 이용한 터널 절연막을 급속 열처리 공정 (Rapid Thermal Annealing-RTA) 과 H2/N2분위기에서 후속열처리 공정 (Post-RTA)을 통하여 전기적인 특성을 개선 시켰다. 적층된 터널 절연막은 열처리를 통해 터널링 전류의 민감도의 향상과 함께 누설전류가 감소됨으로서 우수한 전기적인 특성이 나타남을 확인하였으며, 적층된 터널 절연막 구조와 적절한 열처리를 이용하여 빠른 쓰기/지우기 속도와 전기적인 특성이 향상된 비휘발성 메모리 소자를 기대할 수 있다.

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Growth of Nanocrystalline Graphite on Sapphire by Solid Carbon Source Molecular Beam Epitaxy

  • Jerng, S.K.;Yu, D.S.;Kim, Y.S.;Ryou, Jung-A;Hong, Suk-Lyun;Kim, C.;Yoon, S.;Efetov, D.K.;Kim, P.;Chun, S.H.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.51-51
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    • 2011
  • We have grown nanocrystalline graphite on sapphire substrate by using solid carbon source molecular beam epitaxy. Changes of structure from amorphous carbon to nanocrystalline graphite controlled by the growth temperature have been investigated by Raman spectroscopy. Raman spectra show D, G, and 2D peaks, whose intensities vary on the growth temperature. Atomic force microscopy reveals that the surface is very flat. Sapphire substrates of different cutting direction produce similar results. Simulations suggest that the interaction between carbon and oxygen causes disorders. Electrical transport measurements exhibit a Dirac-like peak, including a carrier type change by an external gate voltage bias.

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A Novel Dead Time Minimization Algorithm for improving the inverter output waveforms (인버터 출력파형 개선을 위한 새로운 휴지기간 최소화 알고리즘)

  • Han, Yun-Seok;Choe, Jeong-Su;Kim, Yeong-Seok
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.48 no.5
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    • pp.269-277
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    • 1999
  • In this paper, a novel dead time minimization algorithm is proposed for improving the output waveform of an inverter. The adverse effects of the dead time are mainly described by the voltage drop and the distortion factor of waveforms. The principle of the proposed algorithm is organized with forbidding unnecessary firings fo the inverter switches which are not conducted even though the gate signal is impressed. The proposed methods are explained with the conduction mode of output currents. The H/W and S/W implementation method of the proposed algorithm are also presented. The validity of the proposed algorithm is verified by comparing the simulation and experimental results with conventional methods. It can be concluded from the results that the proposed algorithm has the advantage which is able to reduce the harmonics in the output voltages and which the output voltage can nearly be equal to the reference value. Another advantage of the proposed method is the reduction of total numbers of switching so that the switching losses of inverter drives can be minimized.

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Effect of RF Power on the Stability of a-IGZO Thin Film Transistors

  • Choe, Hyeok-U;Gang, Geum-Sik;No, Yong-Han
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.354-355
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    • 2013
  • 최근 디스플레이 분야에서 amorphous InGaZnO (a-IGZO) thin film transistors (TFTs)는 a-Si:H에 비해 비정질 상태에서도 비교적 높은 이동도를 가지고 다결정 Si 반도체에 비해 저온공정이 가능하고 대면적화가 용이한 장점 때문에 주목받고 있다. 또한 넓은 밴드갭을 가지기 때문에 가시광선 영역에서 투명하여 투명소자에도 응용이 가능하다. 본 연구에서는 RF magnetron sputtering법을 이용하여 RF power의 변화에 따라 IGZO 박막의 positive bias stress (PBS)에 대한 안정성을 조사하였다. 소결된 타겟으로는 In:Ga:ZnO를 각각 2:2:1 mol%의 조성비로 소결하여 이용하였고, 공정 조건은 초기 압력 Torr, 증착 압력 Torr, Ar:O2=18:12 sccm로 고정하였다. 공정 변수로는 130 W, 150 W, 170 W, 200 W로 변화를 주어 실험을 진행하였다. PBS 측정은 gate bias를 10 V로 고정하여 stress 시간을 각각 0, 30, 100, 300, 1,000, 3,000, 7,000초를 적용하였다. 측정 결과 RF power가 증가할수록 문턱전압의 변화량이 증가하는 것을 보였다. 130 W의 경우 4.47 V의 변화량을 보였지만 200 W의 경우는 10.01 V로 증가되어 나타났다. 따라서 RF power을 낮추어 만들어진 소자의 경우 RF power를 높여 만들어진 소자에 비해 PBS에 대한 안정성이 더 높은 결과를 확인하였다.

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The Improvement of the Ionization on Micro Mass Spectrometer using Carbon Nanotube Emitter (탄소나노튜브 방출원을 통한 초소형 질량분석기의 이온화 향상)

  • Song, S.H.;Han, Kyu-Sung;Hong, Nguyen Tuan;Lee, S.I.;Yang, Sang-Sik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.5
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    • pp.1004-1009
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    • 2009
  • Recently, mass spectrometers are widely used for in-situ chemical analysis. It has rapid response and high sensitivity. In this paper, we present the fabrication and test of a cold cathode emitter for micro mass spectrometer using CNTs(Carbon nano tubes). The CNTs have good mechanical, electrical and chemical characteristics. So they have a long life time and strong robustness. The micro mass spectrometer is composed of the glass substrate and the silicon substrate. The glass substrate is constructed by electrodes for TOF(Time-of-flight) which analyze an ion with mass to charge ratio as ion separator. The silicon substrate is highly doped wafer which is patterned for gate electrode and then 100 11m dry etching to grow the CNTs as the electron emitter. The CNTs are grown by HFCVD(Hot filament chemical vapor deposition) with sputtering the catalyst. We successfully attained to grow the CNTs and to test the characteristics.

Implementation of Multilevel Boost DC-Link Cascade based Reversing Voltage Inverter for Low THD Operation

  • Rao, S. Nagaraja;Kumar, D.V. Ashok;Babu, Ch. Sai
    • Journal of Electrical Engineering and Technology
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    • v.13 no.4
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    • pp.1528-1538
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    • 2018
  • In this paper, configuration of $1-{\phi}$ seven-level boost DC-link cascade based reversing voltage multilevel inverter (BDCLCRV MLI) is proposed for uninterrupted power supply (UPS) applications. It consists of three level boost converter, level generation unit and full bridge circuit for polarity generation. When compared with conventional boost cascaded H-bridge MLI configurations, the proposed system results in reduction of DC sources, reduced power switches and gate drive requirements. Inverter switching is accomplished by providing appropriate switching angles that is generated by any optimization switching angle techniques. Here, round modulation control (RMC) method is taken as the optimization method and switching angles are derived and the same is compared with various switching angles methods i.e., equal-phase (EP) method, and half-equal-phase (HEP) method which results in improved quality of obtained AC power with lowest total harmonic distortion (THD). Reduction in DC sources and switch count makes the system more cost effective. A simulation and prototype model of $1-{\phi}$ seven-level BDCLCRV MLI system is developed and its performance is analyzed for various operating conditions.

Hall Effect of FeSi$_2$ Thin Film by Magnetic Field (FeSi$_2$박막 흘 효과의 자계의존성)

  • 이우선;김형곤;김남오;서용진
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.234-237
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    • 2001
  • FeSi$_2$/Si Layer were grown using FeSi$_2$, Si wafer by the chemical transport reaction method. The directoptical energy gap was found to be 0.871ev at 300 K. The Hall effect is a physical effect arising in matter carrying electric current in the presence of a magnetic field. The effect is named after the American physicist E. H. Hall, who discovered it in 1879. In this paper, we study electrical properties of FeSi$_2$/Si layer And then we measured Hall coefficient Hall mobility, carrier density and Hall voltage according to variation magnetic field and temperature, Because of important Part for it application Various phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.

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Hall Effect of $FeSi_2$ Thin Film by Temperature ($FeSi_2$박막 홀 효과의 온도의존성)

  • 이우선;김형곤;김남오;정헌상
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.230-233
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    • 2001
  • FeSi$_2$ Layer were grown using FeSi$_2$, Si wafer by the chemical transport reaction method. The directoptical energy gap was found to be 0.87leV at 300 K. The Hall effect is a Physical effect arising in matter carrying electric current in the presence of a magnetic field. The effect is named after the American physicist E.H. Hall, who discovered it in 1879. In this paper, we study electrical properties of FeSi$_2$/Si layer. And then we measured Hall coefficient Hall mobility, carrier density and Hall voltage according to variation magnetic field and temperature, Because of important part for it application various phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.

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Characteristics of HfO2 Thin Films Using Wet Etching (습식식각을 이용한 HfO2 박막의 식각특성)

  • Yang, Jeung-Ryoul;Kwak, Noh-Seok;Lim, Jung-Hun;Choi, Yong-Jae;Hwang, Taek-Sung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.9
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    • pp.687-692
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    • 2011
  • Hafnium oxide ($HfO_2$) was very advantageous for substitute material of gate on existing transistor. $HfO_2$ has been widely studied due to high contact with polysilicon and thermal stability and also, it is easily etched by using HF solution. In this study, $HfO_2$ and thermal oxide films were etched by wet etch method using chemical etchant. Etch rate of $HfO_2$ and thermal oxide was linearly increased with increasing concentration of HF and temperature but etch rate of $HfO_2$ was higher than thermal oxide due to $H^+$, $F^-$, and $HF_2^-$ ions at below 0.5% concentration of HF. And also, etch selectivity was improved by adding Hydrazine as additive.