• Proceedings of the IEEK Conference
• /
• 1998.06a
• /
• pp.819-822
• /
• 1998

The high complexity of digital circuits has changed the digital circuits design mehtods from schemeatic-based to hardware description languages like VHDL, verilog that make hardware faults become more hard to detect. Thus test generation to detect hardware defects is very important part of the design. But most of the test generation methods are gate-level based. In this paper new high-level test generation method to detect stuck-at-faults on gate level is described. This test generation method is independent of synthesis results and reduce the time and efforts for test generation.

• International Journal of Contents
• /
• v.18 no.1
• /
• pp.76-84
• /
• 2022

Tidal power generation plays a critical role in reducing greenhouse gas emissions. It uses a tidal force generated by gravitational force between the moon, the earth, and the sun. The change of seawater height generates the tide-generating force, and the magnitude of the change is the tide level. The tide level change has the same period as the tide-generating force twice a day, every 29.5 days, every year, and every 18.6 years. Sihwa Lake Tidal Power Station is Korea's first tidal power plant that began commercial power generation in August 2011 and has been accumulating a large volume of data on electricity production, power generation sales, sluice displacement, and tide levels. The purpose of this paper was to analyze the impact of the inefficiency factors affecting production and the tidal level change on tidal power generation and their characteristics using Sihwa Lake Tidal Power's operational performance data. Throughout this paper we show that tidal power generating operation is accurately predicting the trends of magnitude of tidal force to be periodical for each day. determining the drop to initiate the water turbine generator factoring the constraints on the operation of Sihwa Lake, and reflecting the water discharge through the floodgate and water turbine during the standby mode in the power generation plan to be in the optimal condition until the initiation of the next power generation can maximize power generation.

• Proceedings of the IEEK Conference
• /
• 2000.06b
• /
• pp.137-140
• /
• 2000

In this paper, we have proposed an efficient test generation method for asynchronous circuits. The test generation is based on specification level, especially on Signal Transition Graph(STG)〔1〕 which is a kind of specification method for asynchronous circuits. To conduct a high-level test generation, we have defined a high-level fault model, called single State Transition Fault(STF) model on STG and proposed a test generation algorithm for STF model. The effectiveness of the proposed fault model and its test generation algorithm is shown by experimental results on a set of benchmarks given in the form of STG. Experimental results show that the generated test for the proposed fault model achieves high fault coverage over single input stuck-at fault model with low cost. We have also proposed extended STF model with additional gate-level information to achieve higher fault coverage in cost of longer execution time.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.28A no.12
• /
• pp.65-72
• /
• 1991

A cost model of test generation is presented in this paper. The cost of flat gate-level and hierarchical modular level test generation for combinational logic circuits are modeled. The model shows that the cost of hierarchical test generation grows as GlogGunder some assuptions, while the cost of gate-level test generation grows $G^2<$/TEX>, where G is the number of gates in a circuit under test. The cost model derived in this paper is used to explain why some test generation techniques are faster and why hierarchical test generators should be faster than flat test generators on large circuits.

• Journal of Family Resource Management and Policy Review
• /
• v.5 no.1
• /
• pp.97-110
• /
• 2001

This study was designed to examine the effect of joint participation in decision-making on the home management satisfaction of new-generation married women, which will issue basic data for improving the quality of new-generation home life. The sample was composed of 371 married women under 39years old, selected by age and the local distribution. Major findings are as follows. 1) New-generation married women’s joint participation in decision-making showed a significant difference by degree of communication, perception of the adequacy of resources, perception of the level of living. Home management satisfaction shoed a significant difference by state of employment, existence of children, sex role attitudes, degree of communication, perception of the adequacy of resources, perception of the level of living. 2) The more a couple participated in decision-making about eating and children, the higher level a new-generation married women showed in home management satisfaction. 3) The main variables predicating new-generation married women’s home management satisfaction was perception of the adequacy of resources, perception of the level of living, gender role attitudes, existence of children, joint participation in decision-making about eating and children. They accounted for 36% of the variance.

• Proceedings of the IEEK Conference
• /
• 1998.10a
• /
• pp.1005-1008
• /
• 1998

IC testing plays a very important role in IC manufacturing process. Modern complex ASIC chips making it difficult for gate level and RLT level test generation techniques to generate good test vector in resonable time. In this paper we proposed new test pattern generation method in VHDL description to detect manufacturing faults. This method based on software testing can easily generate test vector and independent to synthesis result.

• Journal of the Korean Home Economics Association
• /
• v.36 no.10
• /
• pp.145-160
• /
• 1998

The purposes of this research were to find out general trends of family value orientations among adolescent, middle and old generation and to investigate the differences according to related variables. For this study, three kinds of questionnaire were used and the data were obtained through 1194 samples of three generation groups living in Seoul and Kwangju. The traditional trends of old generation's value orientations were outstanding while adolescents relatively showed modernized value orientations. The value differences between adolescent and middle generation were larger than between middle and old generation. Especially value orientations of children and sex-role were largely changed, but familism was relatively preserved even in adolescent generation. The family value orientations differed significantly according to gender, age, eduaction level, income, occupation, and family type. Generally middle and adolescent women showed more modernized value orientatons than men and value orientations of three generation were most likely to be correlated with family satisfaction level.

• Proceedings of the IEEK Conference
• /
• 1998.10a
• /
• pp.1065-1068
• /
• 1998

This paper proposes a new test generation method. Most of the test generation methods are gate-level based, but our scheme is VHDL based, especially in other word, behavioral-level based. Our test pattern generation method uses software test method. And we generate deterministic test pattern with this method. The purpose of our method is to reduce the time and effort to generate the test patterns for the end-product test of IC.

• Analyses & Alternatives
• /
• v.4 no.2
• /
• pp.103-132
• /
• 2020

The purpose of this study is to observe whether intergenerational differences exist in support among major Korean political parties and, if so, how they exist, based on the results of the survey conducted nationwide. To achieve the purpose of the study, a questionnaire was prepared based on conjoint analysis, and the collected data was analyzed by applying a random parameter logit model. The main results of model analysis are summarized as follows. First, among the policy variables, statistically significant results were observed in the generation of 20s and 30s for the education variable. It was found that both 20s and 30s aimed for equal education at a higher level than other generations. Especially, the highest intensity aim for equal education culture was observed in the 20s. Second, the coefficients of major political parties were observed with a high level of statistical significance. This appears to be a result suggesting that voters decide on their voting behavior through thorough policy comparisons in addition to comprehensive consideration on various current issues. Third, a clear support for conservative parties was observed in the generation of 20s. A clear and intense distribution of preference for political parties classified as conservatives was observed in the 20s generation, which can be said to be mainly college students. This seems to be a profound founding related to the issue of "conservatization of the 20s," which has recently become a hot topic in Korean society. Fourth, a high level of support for progressive parties was observed in the 30s and 40s. The Justice Party can be classified as a minority party in the National Assembly House as of January 2019. Nevertheless, it was maintained at a relatively high level in national recognition, and it is presumed that the background was high level of support from the 30s and 40s. Fifth, a large level of standard deviation was observed in the preference for conservative parties in the 50s. This means that some respondents who are in their 50s or older strongly support the Liberty Korea Party, and some respondents in the same generation strongly disapprove it. Due to this countervailing power, it seems that the average support level for the Liberal Korean Party is low in the generations of 50s and older.?

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.30A no.2
• /
• pp.63-75
• /
• 1993

As the CMOS technology becomes the most dominant circuit realization method, the cost problem for the test which includes both the transistor-level FET stuck-on and stuck-off faults and the gatelevel stuck-at faults becomes more and more serious. In accordance, this paper proposes a test set and its generation algorithm, which handles both the transistor-level faults and the gate-level faults, thus can unify the test steps during the IC design and fabrication procedure. This algorithm uses only the logic equation of the given logic function as the input resource without referring the transistor of gate circuit. Also, the resultant test set from this algorithm can improve in both the complexity of the generation algorithm and the time to apply the test as well as unify the test steps in comparing the existing methods.