• 제목/요약/키워드: Gate electrode

검색결과 282건 처리시간 0.028초

Simple fabrication process and characteristic of a screen-printed triode-CNT field emission arrays for the flat lamp application

  • Jung, Y.J.;Park, J.H.;Jeon, S.Y.;Park, S.J.;Alegaonkar, P.S.;Yoo, J.B.;Park, C.Y.
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
    • /
    • pp.1214-1218
    • /
    • 2006
  • We introduced simple fabrication process for field emission devices based on carbon nanotubes (CNTs) emitters. Instead of using the ITO material as a transparent electrode, a metal (Au) with thickness of 5-20nm was used. Moreover, the ITO patterning process was eliminated by depositing metal layer, before the CNT printing process. In addition, the thin metal layer on photo resist (PR) layer was used as UV block. We fabricated the CNT field emission arrays of triode structure with simple process. And I-V characteristics of field emission arrays were measured. The maximum current density of $254{\mu}A/cm2$ was achieved when the gate and the anode voltage was kept 150V and 3000V, respectively. The distance between anode and cathode was kept constant.

  • PDF

High Resolution Electrodes Fabrication for OTFT Array by using Microcontact Printing and Room Temperature Process

  • Jo, Jeong-Dai;Choi, Ju-Hyuk;Kim, Kwang-Young;Lee, Eung-Sug;Esashi, Masayoshi
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
    • /
    • pp.186-189
    • /
    • 2006
  • The flexible organic thin film transistor (OTFT) array to use as a switching device for an organic light emitting diode (OLED) was designed and fabricated in the microcontact printing and room temperature process. The gate, source, and drain electrode patterns of OTFT were fabricated by microcontact printing process. The OTFT array with dielectric layer and organic active semiconductor layer formed at room temperature or at a temperature lower than $40^{\circ}C$. The microcontact printing process using SAM and PDMS stamp made it possible to fabricate OTFT arrays with channel lengths down to even submicron size, and reduced the fabrication process by 10 steps compared with photolithography. Since the process was done in room temperature, there was no pattern shrinkage, transformation, and bending problem appeared. Also, it was possible to improve electric field mobility, to decrease contact resistance, to increase close packing of molecules by SAM, and to reduce threshold voltage by using a big dielectric.

  • PDF

트렌치 구조의 소스와 드레인 구조를 갖는 AlGaN/GaN HEMT의 DC 출력특성 전산모사 (Simulated DC Characteristics of AlGaN/GaN HEMls with Trench Shaped Source/Drain Structures)

  • 정강민;이영수;김수진;김동호;김재무;최홍구;한철구;김태근
    • 한국전기전자재료학회논문지
    • /
    • 제21권10호
    • /
    • pp.885-888
    • /
    • 2008
  • We present simulation results on DC characteristics of AlGaN/GaN HEMTs having trench shaped source/drain Ohmic electrodes. In order to reduce the contact resistance in the source and drain region of the conventional AlGaN/GaN HEMTs and thereby to increase their DC output power, we applied narrow-shaped-trench electrode schemes whose size varies from $0.5{\mu}m$ to $1{\mu}m$ to the standard AlGaN/GaN HEMT structure. As a result, we found that the drain current was increased by 13 % at the same gate bias condition and the transconductance (gm) was improved by 11 % for the proposed AlGaN/GaN HEMT, compared with those of the conventional AlGaN/GaN HEMTs.

2중 알루미늄 전극구조의 Charge Coupled Device를 이용한 저역 여파기 (A Transversal Low Pass Filter Using Charge Coupled Device with Two Level Aluminum Electrode Structure)

  • 신윤승;김오현
    • 대한전자공학회논문지
    • /
    • 제18권3호
    • /
    • pp.25-34
    • /
    • 1981
  • 전하결합소자(charge coupled device)의 제작에 필요한 다중전극구조를 실현하기 위하여 알루미늄양극산화방법을 실험적으로 조사하였다. 양극산화의 전해질용액으로 2% ammonium tartrate를 사용하고, 산화전압을 30∼35 volt로 하여 2시간 정도 산화할 때 형성되는 Al2O3의 두께는 400∼500A이었고 절연파괴전압은 30volt 정도였다. 이와 같은 Al2O3의 성질을 이용하여 CCD transversal 저역여파기를 제작하였다. 17개의 tap coefficient를 갖는 저역파기의 stop band attenuation은 약 22dB 이었으며 사용가능한 주파수 범위는 3 KHz로부터 100KHz까지였다.

  • PDF

미세접촉프린팅공정을 이용한 플렉시블 디스플레이 유기박막구동소자 제작 (Fabrication of Organic Thin Film Transistor(OTFT) for Flexible Display by using Microcontact Printing Process)

  • 김광영;조정대;김동수;이제훈;이응숙
    • 한국정밀공학회:학술대회논문집
    • /
    • 한국정밀공학회 2006년도 춘계학술대회 논문집
    • /
    • pp.595-596
    • /
    • 2006
  • The flexible organic thin film transistor (OTFT) array to use as a switching device for an organic light emitting diode (OLED) was designed and fabricated in the microcontact printing and low-temperature processes. The gate, source, and drain electrode patterns of OTFT were fabricated by microcontact printing which is high-resolution lithography technology using polydimethylsiloxane(PDMS) stamp. The OTFT array with dielectric layer and organic active semiconductor layers formed at room temperature or at a temperature tower than $40^{\circ}C$. The microcontact printing process using SAM(self-assembled monolayer) and PDMS stamp made it possible to fabricate OTFT arrays with channel lengths down to even nano size, and reduced the procedure by 10 steps compared with photolithography. Since the process was done in low temperature, there was no pattern transformation and bending problem appeared. It was possible to increase close packing of molecules by SAM, to improve electric field mobility, to decrease contact resistance, and to reduce threshold voltage by using a big dielecric.

  • PDF

Organic Thin-Film Transistors Fabricated on Flexible Substrate by Using Nanotransfer Molding

  • Hwang, Jae-Kwon;Dang, Jeong-Mi;Sung, Myung-Mo
    • 한국진공학회:학술대회논문집
    • /
    • 한국진공학회 2010년도 제39회 하계학술대회 초록집
    • /
    • pp.287-287
    • /
    • 2010
  • We report a new direct patterning method, called liquid bridge-mediated nanotransfer molding (LB-nTM), for the formation of two- or three-dimensional structures with feature sizes between tens of nanometers and tens of micron over large areas. LB-nTM is based on the direct transfer of various materials from a mold to a substrate via a liquid bridge between them. This procedure can be adopted for automated direct printing machines that generate patterns of functional materials with a wide range of feature sizes on diverse substrates. Arrays of TIPS-PEN TFTs were fabricated on 4" polyethersulfone (PES) substrates by LB-nTM using PDMS molds. An inverted staggered structure was employed in the TFT device fabrication. A 150 nm-thick indium-tin oxide (ITO) gate electrode and a 200 nm-thick SiO2dielectric layer were formed on a PES substrate by sputter deposition. An array of TIPS-PEN patterns (thickness: 60 nm) as active channel layers was fabricated on the substrate by LB-nTM. The nominal channel length of the TIPS-PEN TFT was 10 mm, while the channel width was 135 mm. Finally, the source and drain electrodes of 200 nm-thick Ag were defined on the substrate by LB-nTM. The TIPS-PEN TFTs can endure strenuous bending and are also transparent in the visible range, and therefore potentially useful for flexible and invisible electronics.

  • PDF

Plasma Treatments to Forming Metal Contacts in Graphene FET

  • Choi, Min-Sup;Lee, Seung-Hwan;Lim, Yeong-Dae;Yoo, Won-Jong
    • 한국진공학회:학술대회논문집
    • /
    • 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
    • /
    • pp.121-121
    • /
    • 2011
  • Graphene formed by chemical vapor deposition was exposed to the various plasmas of Ar, O2, N2, and H2 to examine its effects on the bonding properties of graphene to metal. Upon the Ar plasma exposure of patterned graphene, the subsequently deposited metal electrodes remained intact, enabling successful fabrication of field effect transistor (FET) arrays. The effects of enhancing adhesion between graphene and metals were more evident from O2 plasmas than Ar, N2, and H2 plasmas, suggesting that chemical reaction of O radicals induces hydrophilic property of graphene more effectively than chemical reaction of H and N radicals and physical bombardment of Ar ions. From the electrical measurements (drain current vs. gate voltage) of field effect transistors before and after Ar plasma exposure, it was confirmed that the plasma treatment is very effective in controlling bonding properties of graphene to metals accurately without requiring buffer layers.

  • PDF

Charge Spreading Effect of Stored Charge on Retention Characteristics in SONOS NAND Flash Memory Devices

  • Kim, Seong-Hyeon;Yang, Seung-Dong;Kim, Jin-Seop;Jeong, Jun-Kyo;Lee, Hi-Deok;Lee, Ga-Won
    • Transactions on Electrical and Electronic Materials
    • /
    • 제16권4호
    • /
    • pp.183-186
    • /
    • 2015
  • This research investigates the impact of charge spreading on the data retention of three-dimensional (3D) silicon-oxide-nitride-oxide-silicon (SONOS) flash memory where the charge trapping layer is shared along the cell string. In order to do so, this study conducts an electrical analysis of the planar SONOS test pattern where the silicon nitride charge storage layer is not isolated but extends beyond the gate electrode. Experimental results from the test pattern show larger retention loss in the devices with extended storage layers compared to isolated devices. This retention degradation is thought to be the result of an additional charge spreading through the extended silicon nitride layer along the width of the memory cell, which should be improved for the successful 3-D application of SONOS flash devices.

다결정 실리콘 이중전극 구조를 이용한 16$\times$16 이차원 전하결합 영상감지소자의 설계, 제작 및 동작 (Design Fabrication and Operation of the 16$\times$16 charge Coupled Area Image Sensor Using Double Polysilicon Gates)

  • 정지채;오춘식;김충기
    • 대한전자공학회논문지
    • /
    • 제22권3호
    • /
    • pp.68-76
    • /
    • 1985
  • 전하 결함 소자를 이용한 16×16 이차원 영상 감지 소자가 제작되었다. 제작된 소자는 2상(two-Phase)의 전극 구조로 제작 되었고 프레임 이동(frame transfer) 방식으로 동작한다. 표면 전위차를 얻기위해 이온 주입을 했고 NMOS공정을 따라 제작되었다. 영상을 얻기위한 시스템은 광학 렌즈 클럭 발생 및 구동 회로, 계단형 신호 발생기로 이루어지는데, EPROM을 사용하여 클럭 발생회로를 간단하게 하였다. 영상 시스템을 사용하여 오실로스코프 화면에 알파베트를 표시할 수 있었다. 소자의 특성으로 전하 이동 손실률과 암전류를 측정하였다.

  • PDF

다결정 실리콘 박막 트랜지스터 Active Matrix OLED 디스플레이를 위한 이중 변조 구동 (Dual Modulation Driving for Poly-Si TFT Active Matrix OLED Displays)

  • 김재근;정주영
    • 대한전자공학회논문지SD
    • /
    • 제41권10호
    • /
    • pp.17-22
    • /
    • 2004
  • 본 논문에서는 진폭 변조와 펄스 폭 변조를 모두 사용하는 새로운 AMOLED 디스플레이 구동 방식을 개발하였다. 펄스 폭 변조를 위해서 다섯 개의 서브 프레임으로 화상 프레임을 나누었고 진폭 변조를 위해 TFT 게이트 전압에 의해 제어되는 3가지의 OLED 휘도(전류) 레벨을 사용하였다. 이 두 종류의 변조를 조합하여 35(=243) 계조를 얻었다. 그리고 DAC를 사용하지 않고 2개의 쉬프트 레지스터를 갖는 새로운 데이터 전극 구동 회로를 설계하였다. 회로 동작은 6㎛ 채널 길이 다결정 TFT의 전류-전압 특성에서 추출된 TFT 파라미터를 이용한 HSpice 시뮬레이션을 통하여 검증하였다. 시뮬레이션 결과로부터 320×240, 이중 스캔, 243 계조 AMOLED 디스플레이를 구현할 수 있음을 확인하였다.