• Title/Summary/Keyword: Gate Stack

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Hafnium Oxide Layer Based Metal-Oxide-Semiconductor (MOS) Capacitors with Annealing Temperature Variation

  • Lee, Na-Yeong;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.318.1-318.1
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    • 2016
  • Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.

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Power Cell-based Pulsed Power Modulator with Fast Rise Times (빠른 상승 시간을 갖는 파워 셀 기반 펄스 파워 모듈레이터)

  • Lee, Seung-Hee;Song, Seung-Ho;Ryoo, Hong-Je
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.1
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    • pp.25-31
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    • 2021
  • This paper describes the design of a power cell-based pulsed power modulator with fast rise times. The pulse-generating section of the pulse power modulator is a series stack of power cells. Each power cell is composed of a storage capacitor, a pulse switch, and a bypass diode. When the pulse switches are turned on, the capacitors are connected in series and the sum of voltages is applied to the load. For output pulses with fast rise times, an IGBT with fast turn-on characteristics is adopted as a pulse switch and the optimized gate driving method is used. Pspice simulation is performed to account for the gate driving method. A 10 kV, 12-power cell-based pulsed power modulator is tested under resistive load and plasma reactor load. The rise times of output pulses less than 20 ns are confirmed, showing that the pulsed power modulator can be effectively applied to pulsed power applications with fast rise times.

Improvement of Electrical Performance and Stability in ZnO Channel TFTs with Al Doped ZnO Layer (Al Doped ZnO층 적용을 통한 ZnO 박막 트랜지스터의 전기적 특성과 안정성 개선)

  • Eom, Ki-Yun;Jeong, Kwang-Seok;Yun, Ho-Jin;Kim, Yu-Mi;Yang, Seung-Dong;Kim, Jin-Seop;Lee, Ga-Won
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.5
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    • pp.291-294
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    • 2015
  • Recently, ZnO based oxide TFTs used in the flexible and transparent display devices are widely studied. To apply to OLED display switching devices, electrical performance and stability are important issues. In this study, to improve these electrical properties, we fabricated TFTs having Al doped Zinc Oxide (AZO) layer inserted between the gate insulator and ZnO layer. The AZO and ZnO layers are deposited by Atomic layer deposition (ALD) method. I-V transfer characteristics and stability of the suggested devices are investigated under the positive gate bias condition while the channel defects are also analyzed by the photoluminescence spectrum. The TFTs with AZO layer show lower threshold voltage ($V_{th}$) and superior sub-threshold slop. In the case of $V_{th}$ shift after positive gate bias stress, the stability is also better than that of ZnO channel TFTs. This improvement is thought to be caused by the reduced defect density in AZO/ZnO stack devices, which can be confirmed by the photoluminescence spectrum analysis results where the defect related deep level emission of AZO is lower than that of ZnO layer.

Microstep Stepper Motor Control Based on FPGA Hardware Implementation

  • Chivapreecha, Sorawat;Dejhan, Kobchai
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.93-97
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    • 2005
  • This paper proposes a design of stepper motor control in microstep driven mode using FPGA (Field Programmable Gate Array) for hardware implementation. The methods to drive stepper motor in microstep excitation mode are to control of the controlling currents in each phase windings of stepper motor with reference signals. These reference signals are used for controlling the current levels, the required variation of current levels with rotor position can be obtained from the ideal linear or sinusoidal approximations to the static torque-displacement ($T-{\theta}$) characteristic curve. In addition, the hardware implementation of stepper motor controller can be designed uses VHDL (Very high speed integrated circuits Hardware Description Language) and synthesis using an Altera FPGA, FLEX10K family, EPF10K20RC240-4 device as target technology and use MAX+PlusII program for overall development. A multi-stack variable-reluctance stepper motor of Sanyo Denki is used in the experiments.

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Fabrication of Organic Thin-Film Transistors with Polymer Gate Insulators on Plastic Substrate

  • Ahn, Seong-Deok;Kang, Seung-Youl;Oh, Ji-Young;You, In-Kyu;Kim, Gi-Heon;Baek, Kyu-Ha;Kim, Chul-Am;Suh, Kyung-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1170-1173
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    • 2006
  • Active layer patterned OTFT was obtained on a plastic substrate using the optimal growth condition of pentancene thin films as active layer and parylene thin films as passivation layer. Tranditional photolithography was performed to use a dry etch to pattern the material stack. The pentacene thin film and parylene thin film were deposited onto a plastic substrate using PC-OVD and CVD, respectively.

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Crystallinity of $Pb(Nb_{0.04}Zr_{0.28}Ti_{0.68})O_{3}$ capacitors on ferroelectric properties

  • Yang, Bee-Lyong
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.12 no.3
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    • pp.161-164
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    • 2002
  • Polycrystalline and epitaxial heterostructure films of $La_{0.5}Sr_{0.5}CoO_{3}/Pb(Nb_{0.04}Zr_{0.28}Ti_{0.68})O_{3}/La_{0.5}Sr_{0.5}CoO_{3}$ (LSCO/PNZT/LSCO) capacitors were evaluated in terms of low voltage and high speed operation in high density memory, using TiN/Pt conducting barrier combination. Structural studies for a high density ferroelectric memory process flow, which requires the integration of conducting barrier layers to connect the drain of the pass-gate transistor to the bottom electrode of the ferroelectric stack, indicate complete phase purity (i.e. fully perovskite) in both epitaxial and polycrystalline materials. The polycrystalline capacitors show lower remnant polarization and coercive voltages. However, the retention, and high-speed characteristics are similar, indicating minimal influence of crystalline quality on the ferroelectric properties.

Pilot Project of Solar Energy Flood Gate (태양광 전동수문 시범사업)

  • Lee, Jong-Nam;Chung, Kwang-Kun;Lee, Kwang-Ya;Kim, Hea-Do
    • Proceedings of the Korean Society of Agricultural Engineers Conference
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    • 2005.10a
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    • pp.193-198
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    • 2005
  • The solar energy floodgate which discusses will minimize a quotient bringing up for discussion friction resistance and it will do to write a disturbance power, with the base which will reach it will be able to use the solar power unit in order. It is a plan which to magnification supply the practicality and will give proof will the effort with the irrigation facility of the farming village. Magnification supply of the solar energy floodgate which it sees hazard the stack supervisor and the possibility the use against the farmer and the easy frost does the monitoring against and the work which it complements is necessary.

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Investigating InSnZnO as an Active Layer for Non-volatile Memory Devices and Increasing Memory Window by Utilizing Silicon-rich SiOx for Charge Storage Layer

  • Park, Heejun;Nguyen, Cam Phu Thi;Raja, Jayapal;Jang, Kyungsoo;Jung, Junhee;Yi, Junsin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.324-326
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    • 2016
  • In this study, we have investigated indium tin zinc oxide (ITZO) as an active channel for non-volatile memory (NVM) devices. The electrical and memory characteristics of NVM devices using multi-stack gate insulator SiO2/SiOx/SiOxNy (OOxOy) with Si-rich SiOx for charge storage layer were also reported. The transmittance of ITZO films reached over 85%. Besides, ITZO-based NVM devices showed good electrical properties such as high field effect mobility of 25.8 cm2/V.s, low threshold voltage of 0.75 V, low subthreshold slope of 0.23 V/dec and high on-off current ratio of $1.25{\times}107$. The transmission Fourier Transform Infrared spectroscopy of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000-2300 cm-1. It indicates that many silicon phases and defect sources exist in the matrix of the SiOx films. In addition, the characteristics of NVM device showed a retention exceeding 97% of threshold voltage shift after 104 s and greater than 94% after 10 years with low operating voltage of +11 V at only 1 ms programming duration time. Therefore, the NVM fabricated by high transparent ITZO active layer and OOxOy memory stack has been applied for the flexible memory system.

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Interfacial Charge Transport Anisotropy of Organic Field-Effect Transistors Based on Pentacene Derivative Single Crystals with Cofacial Molecular Stack (코페이셜 적층 구조를 가진 펜타센 유도체 단결정기반 유기트랜지스터의 계면 전하이동 이방성에 관한 연구)

  • Choi, Hyun Ho
    • Journal of Adhesion and Interface
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    • v.20 no.4
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    • pp.155-161
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    • 2019
  • Understanding charge transport anisotropy at the interface of conjugated nanostructures basically gives insight into structure-property relationship in organic field-effect transistors (OFET). Here, the anisotropy of the field-effect mobility at the interface between 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) single crystal with cofacial molecular stacks in a-b basal plane and SiO gate dielectric was investigated. A solvent exchange method has been used in order for TIPS-pentacene single crystals to be grown on the surface of SiO2 thin film, corresponding to the charge accumulation at the interface in OFET structure. In TIPS-pentacene OFET, the anisotropy ratio between the highest and lowest measured mobility is revealed to be 5.2. By analyzing the interaction of a conjugated unit in TIPS-pentacene with the nearest neighbor units, the mobility anisotropy can be rationalized by differences in HOMO-level coupling and hopping routes of charge carriers. The theoretical estimation of anisotropy based on HOMO-level coupling is also consistent with the experimental result.