• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.58-65
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• 2009

In this paper, we designed high voltage gate drive IC including dead time circuit in which capacitors controlled rising time and falling time, and schimitt-triggers controlled switching voltage. Designed High voltage gate drive IC improves an efficiency of half-bridge converter by decreasing dead time variation against temperature and has variable dead time by the capacitor value. and its power dissipation, which is generated on high side part level shifter, has decreased 52 percent by short pulse generation circuit, and UVLO circuit is designed to prevent false-operation. We simulated by using Spectre of Cadence to verify the proposed circuit and fabricated in a 1.0um process.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.285-286
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• 2014

Recently, the unipolar gate power source is preferred in inverter system because of cost reduction reason. In this case, designer uses 0V source for turning-off the switching devices instead of negative voltage at Vee source. If the gate driver circuit has some stray inductance, the gate voltage would happen a surge voltage. This paper analyzes that of stray inductance effect during the switching behavior in the circuit and the proposed solutions were verified by pulse test.

• Journal of Information Display
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• v.12 no.1
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• pp.61-67
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• 2011

A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.746-748
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• 1993

To overcome the problem of the diode reverse recovery in high switching frequency inverter, a new gate drive scheme is proposed for IGBT in this paper. Using this circuit, the reverse recovery current can be controlled and faster switching time can be achieved for hard switching inverter. The over-current protection method, which is suitable for the proposed gate driver, is also presented. The operation of the proposed circuit is investigated and its usefulness is verified through the experimental results.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.380-383
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• 2000

This paper presents about EL(electro-luminescent) driver with inverter Inverter is constructed by using characteristic of FET and its output characteristics is analysed for the variation of gate bias frequency and load. The optimum operating condition of inverter is that the gate bias frequency of FET equal two resonant frequency of circuit.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.36-37
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• 2013

This paper presents high voltage operation sensing boost converter with high side current. Proposed topology has three functions which are high voltage driving, high side current sensing and low voltage boost controller. High voltage gate driving block provides LED dimming function and switch function such as a load switch of LED driver. To protect abnormal fault and burn out of LED bar, it is applied high side current sensing method with high voltage driver. This proposed configuration of boost converter shows the effectiveness capability to LED driver through measurement results.

• Journal of Electrical Engineering and Technology
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• v.12 no.2
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• pp.632-642
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• 2017

This paper presents an improved approach towards reducing the switching loss of insulated gate bipolar transistors (IGBTs) for a medium-capacity-class power conditioning system (PCS). In order to improve the switching performance, the switching operation is analyzed, and based on this analysis, an improved switching method that reduces the switching time and switching loss is proposed. Compared to a conventional gate drive scheme, the switching loss, switching time, and delay are improved in the proposed gate driving method. The performance of the proposed gate driving method is verified through several experiments.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.2
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• pp.111-121
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• 1999

This paper deals with an active gate drive (AGD) technolo밍T for high power IGBTs. It is based on an optimal c combination of several requirements necessmy for good switching performance under hard switching conditions, The s scheme specifically combines together the slow drive requirements for low noise and switching stress and the fast driver requirements for high speed switching and low switching energy loss The gate drive can also effectively dampen oscillations during low cunent turnlongrightarrowon transient in the IGBT, This paper looks at the conflicting requirements of the c conventional gate dlive circuit design and the experimental results show that the proposed threelongleftarrowstage active gate dlive t technique can be an effective solution.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.528-531
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• 2007

This paper presents development of a 4-inch WVCA OCB (Optical Compensated Bend)-mode display panel. The developed panel has a built-in circuit of the LTPS (low temperature poly-Si)-integrated gate driver circuit with the function of black data insertion. The function of black data insertion makes it possible to realize rapid response time of 4ms and wide viewing angle of $160^{\circ}$. We also applied the RGBW pixel structure for the brighter image with relatively low power consumption. The developed panel showed improved optical efficiency and driving capability of stable image quality for OCB mode. We developed high efficiency OCB-mode panel with built-in integrated gate driver circuit using LTPS on panel without any external driver IC.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.6
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• pp.1-8
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• 2012

This paper presents a fully-integrated buck converter equipped with packaging inductors. These inductors include parasitic inductances of the bonding wires and lead frames in the package. They have significantly better Q factors than the best on-chip inductors implemented on silicon. This paper also proposes a low-swing gate driver for efficient regulation of high-frequency switching converters. The low-swing driver uses the voltage drop of a diode-connect transistor. The proposed converter is designed and fabricated using a $0.13-{\mu}m$ CMOS process. The fully-integrated buck converter achieves 68.7% and 86.6% efficiency for 3.3 V/2.0 V and 2.8 V/2.3 V conversions, respectively.