• 제목/요약/키워드: Gate Drive Circuit

검색결과 94건 처리시간 0.022초

Comparative Study on the Structural Dependence of Logic Gate Delays in Double-Gate and Triple-Gate FinFETs

  • Kim, Kwan-Young;Jang, Jae-Man;Yun, Dae-Youn;Kim, Dong-Myong;Kim, Dae-Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제10권2호
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    • pp.134-142
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    • 2010
  • A comparative study on the trade-off between the drive current and the total gate capacitance in double-gate (DG) and triple-gate (TG) FinFETs is performed by using 3-D device simulation. As the first result, we found that the optimum ratio of the hardmask oxide thickness ($T_{mask}$) to the sidewall oxide thickness ($T_{ox}$) is $T_{mask}/T_{ox}$=10/2 nm for the minimum logic delay ($\tau$) while $T_{mask}/T_{ox}$=5/1~2 nm for the maximum intrinsic gate capacitance coupling ratio (ICR) with the fixed channel length ($L_G$) and the fin width ($W_{fin}$) under the short channel effect criterion. It means that the TG FinFET is not under the optimal condition in terms of the circuit performance. Second, under optimized $T_{mask}/T_{ox}$, the propagation delay ($\tau$) decreases with the increasing fin height $H_{fin}$. It means that the FinFET-based logic circuit operation goes into the drive current-dominant regime rather than the input gate load capacitance-dominant regime as $H_{fin}$ increases. In the end, the sensitivity of $\Delta\tau/{\Delta}H_{fin}$ or ${{\Delta}I_{ON}}'/{\Delta}H_{fin}$ decreases as $L_G/W_{fin}$ is scaled-down. However, $W_{fin}$ should be carefully designed especially in circuits that are strongly influenced by the self-capacitance or a physical layout because the scaling of $W_{fin}$ is followed by the increase of the self-capacitance portion in the total load capacitance.

과전압 제한 기능을 갖는 새로운 IGBT 게이트 구동회로 (Improved Gate Drive Circuit for High Power IGBTs with a Novel Overvoltage Protection Scheme)

  • 이황걸;이요한;서범석;현동석;이진우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1996년도 추계학술대회 논문집 학회본부
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    • pp.346-349
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    • 1996
  • In application of high power IGBT PWM inverters, the treatable power range is considerably limited due to the overvoltage caused by the stray inductance components within the power circuit. This paper proposes a new gate drive circuit for IGBTs which can actively suppress the overvoltage across the driven IGBT at turn-off and the overvoltage across the opposite IGBT at turn-on while preserving the most simple and reliable power circuit. The turn-off driving scheme has adaptive feature to the amplitude of collector current, so that the overvoltage is limited much effectively at the larger collector current. The turn-on scheme is to decrease the rising rate of the collector current by increasing input capacitance during turn-on transient when the gate-emitter voltage is greater than threshold voltage. The experimental results under various normal and fault conditions prove the effectiveness of the proposed circuit.

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고전력 절연 게이트 소자의 구동 및 보호용 파워 IC의 설계 (A Design of Gate Drive and Protection IC for Insulated Gate Power Devices)

  • 고민정;박시홍
    • 대한전자공학회논문지SD
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    • 제46권3호
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    • pp.96-102
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    • 2009
  • 본 논문에서는 600V/200A 또는 1200V/150A와 같은 고전력 절연 게이트 소자를 구동 및 보호하기 위한 파워 IC에 대한 연구에 대해서 살펴보았다. 고전력 소자의 구동을 위해서 최대 Sourcing 전류 4A, 최대 Sinking 전류 8A로 설계하였으며, 과전류 보호회로로는 전력소자의 드레인(콜렉터) 전압을 측정하여, Desaturation을 검출하는 방식을 사용하였다. 또한 과전류 보호시 기생 인덕턴스에 의해 발생할 수 있는 과전압을 억제하기 위해서 soft-shutdown 기능을 추가하였다. 제안된 게이트 구동 IC는 동부하이텍의 고전압 BCDMOS 공정인 0.35um BDA350 공정과 PDK를 사용하여 설계 및 제작하여 검증하였다.

Ultra-High Resolution and Large Size Organic Light Emitting Diode Panels with Highly Reliable Gate Driver Circuits

  • Hong Jae Shin
    • International journal of advanced smart convergence
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    • 제12권4호
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    • pp.1-7
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    • 2023
  • Large-size, organic light-emitting device (OLED) panels based on highly reliable gate driver circuits integrated using InGaZnO thin film transistors (TFTs) were developed to achieve ultra-high resolution TVs. These large-size OLED panels were driven by using a novel gate driver circuit not only for displaying images but also for sensing TFT characteristics for external compensation. Regardless of the negative threshold voltage of the TFTs, the proposed gate driver circuit in OLED panels functioned precisely, resulting from a decrease in the leakage current. The falling time of the circuit is approximately 0.9 ㎲, which is fast enough to drive 8K resolution OLED displays at 120 Hz. 120 Hz is most commonly used as the operating voltage because images consisting of 120 frames per second can be quickly shown on the display panel without any image sticking. The reliability tests showed that the lifetime of the proposed integrated gate driver is at least 100,000 h.

전력용 IGBT의 시뮬레이션과 과도 해석 (Simulation of Power IGBT and Transient Analysis)

  • 서영수
    • 한국시뮬레이션학회논문지
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    • 제4권2호
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    • pp.41-60
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    • 1995
  • The IGBT(Insulated Gate Bipolar Transistor) is a power semiconductor device that has gained acceptance among circuit design engineers for motor drive and power converter applications. IGBT devices(International Rectifier, Proposed proposed model etc) have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirememts and high current density capability. When designing circuit and systems that utilize IGBTs or other power semiconductor devices, circuit simulations are needed to examine how the devices affect the behavior of the circuit. The interaction of the IGBT with the load circuit can be described using the device model and the state equation of the load circuit. The voltage rise rate at turn-off for inductive loads varies significantly for IGBTs with different base life times, and this rate of rise is important in determing the voltage overshoot for a given series resistor-inductor load circuit. Excessive voltage overshoot is potentially destructive, so a snubber protection circuit may be required. The protection circuit requirements are unique for the IGBT and can be examined using the model. The IGBT model in this paper is verified by comparing the results of the model with experimented results for various circuit operating conditions. The model performs well and describes experimented results accurately for the range of static and dynamic condition in which the device is intended to be operated.

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IGBT 스위칭시 괴전압 제한을 위한 게이트 구동기법 (An Improved Gate Control Scheme for Overvoltage Clamping Under High Power IGBTs Switching)

  • 김완중;최창호;현동석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 전력전자학술대회 논문집
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    • pp.323-327
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    • 1998
  • Under high power IGBTs Switching, a large overvoltage is induced across the IGBT module due to the stray inductance in the circuit. This paper proposes a new gate drive circuit for high power IGBTs which can actively suppress the overvoltage across the driven IGBT at turn-off while preserving the most simple and reliable power circuit. The turn-off driving scheme has adaptive feature to the amplitude of collector current, so that the overvoltage can be limited much effectively at the fault collector current. Experimental results under various normal and fault conditions prove the effectiveness of the proposed.

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효율적인 IGBT 게이트 드라이브 회로에 관한 연구 (Design of High Efficient Gate Drive Circuit for IGBT)

  • 이영식;강준모;김덕중;백수현;김용
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 F
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    • pp.2213-2216
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    • 1997
  • Efficient Switching of IGBT's requires fast gate drivers with high peak currents. This Paper will review the requirements for effient, reliable gate drive of IGBT's and behaviour of an IGBT switching chacteristcs. The purpose of the present paper is to investigate the switching loss mechanisms in IGBT such as MOSFETs in order to give a support to designers of IGBT gate drive circuits in selecting the more appropriate IGBTs to be used on the basics of design repuirements.

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Intelligent Power Module의 플로팅 게이트 전원 공급을 위한 전하 펌프 회로의 설계 (Design of Charge Pump Circuit for Floating Gate Power Supply of Intelligent Power Module)

  • 임정규;정세교
    • 전력전자학회논문지
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    • 제13권2호
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    • pp.135-144
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    • 2008
  • 일반적으로 Intelligent power module (IPM)의 상부 스위치 구동을 위한 플로팅 전원 공급 방법으로 부트스트랩 회로가 많이 사용되고 있다. 부트스트랩 회로는 구성이 간단하고 집적화가 가능하다는 장점이 있으나 몇 가지 문제점을 가지고 있다. 상부 스위치 게이트 드라이버 회로에 전원을 공급하기 위해 매 주기마다 충분한 에너지를 충전할 수 있는 시간이 요구되며, 충전된 에너지는 한정적이므로 스위치 턴 온 (turn-on)시간의 제한을 갖게 된다. 그리고 주파수가 낮아질수록 부트스트랩 커패시터 용량이 증가하여 집적화에 장애요인이 된다. 이러한 단점은 전하 펌프 회로를 사용함으로써 보완될 수 있다. 본 논문에서는 IPM의 플로팅 전원 공급 방법으로 전하 펌프 회로를 적용하여 분석하였으며, 이러한 분석을 기반으로 전하 펌프 회로의 설계 방법을 제안하였다. 분석과 제안된 설계 방법의 타당성을 검증하기 위하여 시뮬레이션과 실험을 수행하였으며, 제시된 결과는 제안된 설계 방법의 유용성을 입증하였다.

최소 변동 및 가변 데드 타임을 갖는 고전압 구동 IC 설계 (Design of High Voltage Gate Driver IC with Minimum Change and Variable Characteristic of Dead Time)

  • 문경수;김형우;김기현;서길수;조효문;조상복
    • 대한전자공학회논문지SD
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    • 제46권12호
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    • pp.58-65
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    • 2009
  • 본 논문에서는 캐패시터로 상승 시간과 하강 시간을 조절하고 슈미트 트리거의 스위칭 전압을 이용한 데드 타임 회로를 갖는 고전압 구동 IC (High Voltage Gate Driver IC)를 설계하였다. 설계된 고전압 구동 IC는 기존 회로와 비교하여 온도에 따 른 데드 타임 변동을 약 52% 줄여 하프브리지 컨버터의 효율을 증대시켰으며 캐패시터 값에 따라 가변적인 데드 타임을 가진다. 또한 숏-펄스 (short-pulse) 생성회로를 추가하여 상단 레벨 쉬프트 (High side part Level shifter)에서 발생하는 전력소모를 기존의 회로에 비해 52% 감소 시켰고, UVLO를 추가하여 시스템의 오동작을 방지하여 시스템의 안정도를 향상시켰다. 제안한 회로를 검증하기 위해 Cadence의 Spectre을 이용하여 시뮬레이션 하였고 1.0um 공정을 이용하였다.

MOS 제어 다이리스터의 특성 해석 및 시뮬레이션을 위한 모델 (Switching Characteristics and PSPICE Modeling for MOS Controlled Thyristor)

  • 이영국;현동석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1994년도 하계학술대회 논문집 A
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    • pp.237-239
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    • 1994
  • The MOS-controlled thyristor(MCT) is a new power semi-conductor device that combines four layers thyristor structure presenting regenerative action and MOS-gate providing controlled turn-on and turn-off. The MCT has very fast switching speed owing to voltage controlled MOS-gate, and very low on-state voltage drop resulting from regenerative action of four layers thyristor structure. In addition, because of a higher dv/dt rating and di/dt rating, gate drive circuit and snubber circuit can be simpler comparing to other power switching devices. So recently much interest and endeavor is being applied to develop the performance and ratings of the MCT. This paper describes the switching characteristic of the MCT for its practical applications and presents a model for PSPICE circuit simulation. The model for PSPICE circuit simulation is compared to the experimental result using MCTV75P60F1 made by Harris co..

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