• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2594-2596
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• 1999

Recently, white good market has interest with inverter product, which has merit to on/off type with respect to energy saving and noise. But, inverter product's cost is rising, because of adding inverter circuit component. To reduce cost, inverter gate drive trend is using HVIC which needs only single voltage. Also using HVIC, designer can compact PCB'size. This paper shows application technique and key point of designing HVIC

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.647-654
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• 2013

The design and analysis of analog circuit application on CMOS technology are a challenge in deep sub-micrometer process. This paper is a study on the performance value of Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with Gate Stack and the channel engineering Single Halo (SH), Double Halo (DH). Four different structures have been analysed keeping channel length constant. The short channel parameters and different sub-threshold analog figures of merit (FOMs) are analysed. This work extensively provides the device structures which may be applicable for high speed switching and low power consumption application.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.530-537
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• 2013

An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.522-529
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• 2013

In this paper, simple but very effective techniques to suppress subthreshold hump effect for high-voltage (HV) complementary metal-oxide-semiconductor (CMOS) technology are presented. Two methods are proposed to suppress subthreshold hump effect using a simple layout modification approach. First, the uniform gate oxide method is based on the concept of an H-shaped gate layout design. Second, the gate work function control method is accomplished by local ion implantation. For our experiments, $0.18{\mu}m$ 20 V class HV CMOS technology is applied for HV MOSFETs fabrication. From the measurements, both proposed methods are very effective for elimination of the inverse narrow width effect (INWE) as well as the subthreshold hump.

• The Journal of the Korea Contents Association
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• v.6 no.2
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• pp.1-8
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• 2006

In this paper, we address to develop a port container management system using RFID, which is one of the main technologies in ubiquitous. Our system is designed and implemented based on the following technologies: a port gate automation using RFID for container identification, web programming for both communication of the gate and deposit/delivery of a container, and wireless embedded router technology for both port container network platform and cram terminals. The developed system using RFID will be expected to use in main part of the port logistic management system aimed to the intelligent port.

• Journal of Drive and Control
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• v.12 no.4
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• pp.15-20
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• 2015

Unlike a typical metal spring, a gas spring uses compressed gas contained in a cylinder and compressed by a piston to exert a force. A common application includes automobiles where gas spring are incorporated into the design of open struts that support the weight of tail gate. They are also used in furniture such as office chairs, and in medical and aerospace applications. The gas spring works by the application of pressurized gas (nitrogen) contained in a cylinder. The internal pressure of the gas spring greatly exceeds atmospheric pressure. This differential in pressure exists at any rod position and generates an outward force on the rod, making the gas spring extend. In this paper, we investigated the dynamic characteristics of a gas spring on an automotive tail gate system.

• Proceedings of the KIEE Conference
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• 1999.11d
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• pp.956-958
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• 1999

We designed and fabricated p-type MOSFETs with floating gate in n-type well lesion and examined their photo characteristics. The fabricated MOBFETs showed a high photo-respsonse characteristics, indicating a possibility as a photo sensor. The structures of MOSFETs were changed as to the number of gate and channel. As the number of channel increased, the induced current by light source s increased. However, the effect of the number of gate was negligble on the photo-response characteristics of the device.

• ETRI Journal
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• v.31 no.6
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• pp.725-731
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• 2009

In this paper, electrostatic discharge (ESD) protection circuits with an advanced substrate-triggered NMOS and a gate-substrate-triggered NMOS are proposed to provide low trigger voltage, low leakage current, and fast turn-on speed. The proposed ESD protection devices are designed using 0.13 ${\mu}m$ CMOS technology. The experimental results show that the proposed substrate-triggered NMOS using a bipolar transistor has a low trigger voltage of 5.98 V and a fast turn-on time of 37 ns. The proposed gate-substrate-triggered NMOS has a lower trigger voltage of 5.35 V and low leakage current of 80 pA.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.21-25
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• 1999

In order to remove minority carries of the base region at changing signal in conventional bipolar logic circuit, we made transistor which is composed of NPN transistor shortened buried layer under the Base region, PNP transistor which is merged in base, epi layer and substrate. Also the Ring-Oscillator for measuring transmission time-delay per gate was designed as well. In the result, we get amplitude of logic voltage of 200mV, the minimum of transmission delay-time of 211nS, and the minimum of transmission delay-time per gate of 7.26ns in AC characteristic output of Ring-Oscillator connected Gate.

• ETRI Journal
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• v.32 no.4
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• pp.530-539
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• 2010

As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits, quantum mechanical effects are expected to become more and more important. Accurate quantum transport simulators are required to explore the essential device physics as a design aid. However, because of the complexity of the analysis, it has been necessary to simulate the quantum mechanical model with high speed and accuracy. In this paper, the modeling of double gate MOSFET based on an adaptive neuro-fuzzy inference system (ANFIS) is presented. The ANFIS model reduces the computational time while keeping the accuracy of physics-based models, like non-equilibrium Green's function formalism. Finally, we import the ANFIS model into the circuit simulator software as a subcircuit. The results show that the compact model based on ANFIS is an efficient tool for the simulation of nanoscale circuits.