• 제목/요약/키워드: Gallium

검색결과 594건 처리시간 0.03초

카세트 기반 자동합성장치를 사용한 [68Ga]Ga-FAPI-04의 합성방법 연구 (Development of a Synthetic Method for [68Ga]Ga-FAPI-04 Using a Cassette-based Synthesizer)

  • 박준영;강원준
    • 대한임상검사과학회지
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    • 제56권1호
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    • pp.43-51
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    • 2024
  • [68Ga]Ga-FAPI-04는 암세포에 과발현 되어 있는 fibroblast activation protein (FAP)에 특이적으로 결합하는 FAP 저해제(FAP inhibitor, FAPI)에 방사성동위원소 68Ga을 표지한 방사성의약품이다. 본 연구에서는 국내에서 제작된 카세트기반 자동합성장치를 사용하여 [68Ga]Ga-FAPI-04를 제조하는 방법을 개발하였다. [68Ga]Ga-FAPI-04의 합법을 개발하기 위해 완충액 HEPES의 농도, 반응시간, FAPI-04 전구체 양, 반응온도에 따른 표지효율을 확인하였다. [68Ga]Ga-FAPI-04는 2 M HEPES를 사용하여 pH 3.85에서 반응할 경우 가장 높은 표지효율을 획득할 수 있었고, 반응시간이 10분일 경우와 25 ㎍의 FAPI-04 전구체를 사용할 경우 및 100℃에서 반응할 경우 가장 높은 표지효율을 획득할 수 있었다. 또한 최종 합성된 [68Ga]Ga-FAPI-04는 모든 품질기준을 만족하여 본 연구를 통해 개발된 [68Ga]Ga-FAPI-04의 합성법은 FAPI 기반 방사성의 약품생산에 활용도가 높을 것으로 예상된다.

Sr-doped AlOx gate dielectrics enabling high-performance flexible transparent thin film transistors by sol-gel process

  • Kim, Jaeyoung;Choi, Seungbeom;Kim, Yong-Hoon
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.301.2-301.2
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    • 2016
  • Metal-oxide thin-film transistors (TFTs) have gained a considerable interest in transparent electronics owing to their high optical transparency and outstanding electrical performance even in an amorphous state. Also, these metal-oxide materials can be solution-processed at a low temperature by using deep ultraviolet (DUV) induced photochemical activation allowing facile integration on flexible substrates [1]. In addition, high-dielectric constant (k) inorganic gate dielectrics are also of a great interest as a key element to lower the operating voltage and as well as the formation of coherent interface with the oxide semiconductors, which may lead to a considerable improvement in the TFT performance. In this study, we investigated the electrical properties of solution-processed high-k strontium-doped AlOx (Sr-AlOx) gate dielectrics. Using the Sr-AlOx as a gate dielectric, indium-gallium-zinc oxide (IGZO) TFTs were fabricated and their electrical properties are analyzed. We demonstrate IGZO TFTs with a 10-nm-thick Sr-AlOx gate dielectric which can be operated at a low voltage (~5 V).

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Fully automated radiosynthesis of [68Ga]edotreotide ([68Ga]DOTA-TOC) and its quality controls

  • Park, Hyun Sik;Lee, Hong Jin;An, Hyun Ho;Moon, Byung Seok;Lee, Byung Chul;Lee, Won Woo;Kim, Sang Eun
    • 대한방사성의약품학회지
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    • 제3권2호
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    • pp.85-90
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    • 2017
  • $^{68}Ga-PET$ is of growing importance in the practice of nuclear medicine diagnostic imaging for neuroendocrine tumors as well as prostate cancers. Following this interests, we herein present the radiosynthesis process of [$^{68}Ga$]edotreotide ([$^{68}Ga$]DOTA-TOC) based on the fully automated procedure for clinical doses that can be provided the reduction of radiation exposure and high reproducibility. The quality controls of clinical doses in compliant with European Pharmacopoeia are also discussed.

Improved Bias Stress Stability of Solution Processed ITZO/IGZO Dual Active Layer Thin Film Transistor

  • Kim, Jongmin;Cho, Byoungdeog
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.215.2-215.2
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    • 2015
  • We fabricated dual active layer (DAL) thin film transistors (TFTs) with indium tin zinc oxide (ITZO) and indium gallium zinc oxide (IGZO) thin film layers using solution process. The ITZO and IGZO layer were used as the front and back channel, respectively. In order to investigate the bias stress stability of ITZO SAL (single active layer) and ITZO/IGZO DAL TFT, a gate bias stress of 10 V was applied for 1500 s under the dark condition. The SAL TFT composed of ITZO layer shows a poor positive bias stability of ${\delta}VTH$ of 13.7 V, whereas ${\delta}VTH$ of ITZO/IGZO DAL TFT was very small as 2.6 V. In order to find out the evidence of improved bias stress stability, we calculated the total trap density NT near the channel/gate insulator interface. The calculated NT of DAL and SAL TFT were $4.59{\times}10^{11}$ and $2.03{\times}10^{11}cm^{-2}$, respectively. The reason for improved bias stress stability is due to the reduction of defect sites such as pin-hole and pores in the active layer.

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The Investigation of Microwave irradiation on Solution-process amorphous Si-In-Zn-O TFT

  • 황세연;김도훈;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.205-205
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    • 2015
  • 최근, 비정질 산화물 반도체를 이용한 TFT는 투명성, 유연성, 저비용, 저온공정이 가능하기 때문에 차세대 flat-panel 디스플레이의 back-plane TFT로써 다양한 방면에서 연구되고 있다. 산화물 반도체 In-Zn-O-시스템에서는 Gallium (Ga)을 suppressor로 사용한 a-In-Ga-Zn-O (a-IGZO) 뿐만 아니라, Magnesium (Mg), Hafnium (Hf), Tin (Sn), Zirconium (Zr) 등의 다양한 물질이 연구되었다. 그 중 Silicon (Si)은 Ga, Hf, Sn, Zr, Mg과 같은 suppressor에 비해 구하기 쉬우며 가격적인 측면에서도 저렴하다는 장점이 있다. solution 공정으로 제작한 산화물 반도체 TFT는 진공 시스템을 사용한 공정보다 공정시간이 짧고, 저비용, 대면적화가 가능하다는 장점이 있다. 하지만, 투명하고 유연한 device를 제작하기 위해서는 저온 공정과 low thermal budget은 필수적이다. 이러한 측면에서 MWI (Microwave Irradiation)는 저온공정이 가능하며, 짧은 공정 시간에도 불구하고 IZO 시스템의 산화물 반도체의 전기적 특성 향상을 기대할 수 있는 효율 적인 열처리 방법이다. 본 연구에서는 In-Zn-O 시스템의 TFT에서 silicon (Si)를 Suppressor로 사용한 a-Si-In-Zn-O (SIZO) TFT를 제작하여 두 가지 열처리 방법을 사용하여 TFT의 전기적 특성을 확인하였다. 첫 번째 방법은 Box Furnace를 사용하여 N2 분위기에서 $600^{\circ}C$의 온도로 30분간 열처리 하였으며, 두 번째는 MWI를 사용하여 1800 W 출력 (약 $100^{\circ}C$)에 2분간 열처리 하였다. MWI 열처리는 Box Furnace 열처리에 비해 저온 공정 및 짧은 시간에도 불구하고 향상된 전기적 특성을 확인 할 수 있었다.

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Investigation of Plasma Damage and Restoration in InGaZnO Thin-Film Transistors

  • 정하동;박정훈;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.209.1-209.1
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    • 2015
  • Indium gallium zinc oxide (IGZO), indium zinc oxide (IZO) 그리고 zinc tin oxide (ZTO) 같은 zinc oxide 기반의 산화물 반도체는 높은 이동도, 투과도 그리고 유연성 같은 장점을 갖고 있어, display application의 backplane 소자로 적용되고 있다. 또한 최근에는 산화물 반도체를 이용한 thin-film transistor (TFT) 뿐만아니라 resistive random access memory (RRAM), flash memory 그리고 pH 센서 등 다양한 반도체 소자에 적용을 위한 연구가 활발히 진행 중이다. 그러나 zinc oxide 기반의 산화물 반도체의 전기 화학적 불안정성은 위와 같은 소자에 적용하는데 제약이 있다. 산화물 반도체의 안정성에 영향을 미치는 다양한 요인들 중 한 가지는, sputter 같은 plasma를 이용한 공정 진행 시 active layer가 plasma에 노출되면서 threshold voltage (Vth)가 급격하게 변화하는 plasma damage effect 이다. 급격한 Vth의 변화는 동작 전압의 불안정성을 가져옴과 동시에 누설전류를 증가시키는 결과를 초래 한다. 따라서 본 연구에서는, IGZO 기반의 TFT를 제작 후 plasma 분위기에 노출시켜, power와 노출 시간에 따른 전기적 특성 변화를 확인 하였다. 또한, thermal annealing을 적용하여 열처리 온도와 시간에 따른 Vth의 회복특성을 조사 하였다. 이러한 결과는 추후 산화물 반도체를 이용한 다양한 소자 설계 시 유용할 것으로 기대된다.

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Current Increase Effect and Prevention for Electron Trapping at Positive Bias Stress System by Dropping the Nematic Liquid Crystal on the Channel Layer of the a-InGaZnO TFT's

  • Lee, Seung-Hyun;Heo, Young-Woo;Kim, Jeong-Joo;Lee, Joon-Hyung
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.163-163
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    • 2015
  • The effect of nematic liquid crystal(5CB-4-Cyano-4'-pentylbiphenyl) on the amorphous indium gallium zinc oxide thin film transistors(a-IGZO TFTs) was investigated. Through dropping the 5CB on the a-IGZO TFT's channel layer which is deposited by RF-magnetron sputtering, properties of a-IGZO TFTs was dramatically improved. When drain bias was induced, 5CB molecules were oriented by Freedericksz transition generating positive charges to one side of dipoles. From increment of the capacitance by orientation of liquid crystals, the drain current was increased, and we analyzed these phenomena mathematically by using MOSFET model. Transfer characteristic showed improvement such as decreasing of subthreshold slope(SS) value 0.4 to 0.2 and 0.45 to 0.25 at linear region and saturation region, respectively. Furthermore, in positive bias system(PBS), prevention effect for electron trapping by 5CB liquid crystal dipoles was observed, which showing decrease of threshold voltage shift [(${\delta}V$]_TH) when induced +20V for 1~1000sec at the gate electrode.

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16-QAM OFDM-Based W-Band Polarization-Division Duplex Communication System with Multi-gigabit Performance

  • Kim, Kwang Seon;Kim, Bong-Su;Kang, Min-Soo;Byun, Woo-Jin;Park, Hyung Chul
    • ETRI Journal
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    • 제36권2호
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    • pp.206-213
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    • 2014
  • This paper presents a novel 90 GHz band 16-quadrature amplitude modulation (16-QAM) orthogonal frequency-division multiplexing (OFDM) communication system. The system can deliver 6 Gbps through six channels with a bandwidth of 3 GHz. Each channel occupies 500 MHz and delivers 1 Gbps using 16-QAM OFDM. To implement the system, a low-noise amplifier and an RF up/down conversion fourth-harmonically pumped mixer are implemented using a $0.1-{\mu}m$ gallium arsenide pseudomorphic high-electron-mobility transistor process. A polarization-division duplex architecture is used for full-duplex communication. In a digital modem, OFDM with 256-point fast Fourier transform and (255, 239) Reed-Solomon forward error correction codecs are used. The modem can compensate for a carrier-frequency offset of up to 50 ppm and a symbol rate offset of up to 1 ppm. Experiment results show that the system can achieve a bit error rate of $10^{-5}$ at a signal-to-noise ratio of about 19.8 dB.

GaN 단결정에 의해 제조된 $Ga_2O_3$ 나노물질의 구조 (The structure of $Ga_2O_3$ nanomaterials synthesized by the GaN single crystal)

  • 박상언;조채룡;김종필;정세영
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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    • pp.120-120
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    • 2003
  • The metallic oxide nanomaterials including ZnO, Ga$_2$O$_3$, TiO$_2$, and SnO$_2$ have been synthesized by a number of methods including laser ablation, arc discharge, thermal annealing procedure, catalytic growth processes, and vapor transport. We have been interested in preparing the nanomaterials of Ga$_2$O$_3$, which is a wide band gap semiconductor (E$_{g}$ =4.9 eV) and used as insulating oxide layer for all gallium-based semiconductor. Ga$_2$O$_3$ is stable at high temperature and a transparent oxide, which has potential application in optoelectronic devices. The Ga$_2$O$_3$ nanoparticles and nanobelts were produced using GaN single crystals, which were grown by flux method inside SUS$^{TM}$ cell using a Na flux and exhibit plate-like morphologies with 4 ~ 5 mm in size. In these experiments, the conventional electric furnace was used. GaN single crystals were pulverized in form of powder for the growth of Ga$_2$O$_3$ nanomaterials. The structure, morphology and composition of the products were studied mainly by X-ray diffraction (XRD), field emission scanning electron microscopy (FESEM), and high-resolution transmission electron microscopy (HRTEM).).

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GaN Power SIT의 설계변수에 따른 전기적 특성변화에 관한 연구 (A Study on the Electrical Characteristics with Design Parameters in GaN Power Static Induction Transistor)

  • 오주현;양성민;정은식;성만영
    • 한국전기전자재료학회논문지
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    • 제23권9호
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    • pp.671-675
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    • 2010
  • Gallium nitride (GaN), wide bandgap semiconductor, has attracted much attention because they are projected to have much better performance than silicon. In this paper, effects of design parameters change of GaN power static induction transistor (SIT) on the electrical characteristics (breakdown voltage, on resistance) were analyzed by computer simulation. According to the analyzed results, the optimization was performed to get power GaN SIT that has 600 V class breakdown voltage. As a result, we could get optimized 600 V class power GaN SIT that has higher breakdown voltage and lower On resistance with a thin (a several micro-meters) thickness of the channel layer.