• International Journal of Internet, Broadcasting and Communication
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• 제12권2호
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• pp.30-36
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• 2020

We demonstrated a successful fabrication of 4" Gallium Nitride (GaN)/Diamond High Electron Mobility Transistors (HEMTs) incorporated with Inner Slot Via Hole process. We made in manufacturing technology of 4" GaN/Diamond HEMT wafers in a compound semiconductor foundry since reported [1]. Wafer thickness uniformity and wafer flatness of starting GaN/Diamond wafers have improved greatly, which contributed to improved processing yield. By optimizing Laser drilling techniques, we successfully demonstrated a through-substrate-via process, which is last hurdle in GaN/Diamond manufacturing technology. To fully exploit Diamond's superior thermal property for GaN HEMT devices, we include Aluminum Nitride (AlN) barrier in epitaxial layer structure, in addition to conventional Aluminum Gallium Nitride (AlGaN) barrier layer. The current collapse revealed very stable up to Vds = 90 V. The trapping behaviors were measured Emission Microscope (EMMI). The traps are located in interface between Silicon Nitride (SiN) passivation layer and GaN cap layer.

• 한국전기전자재료학회논문지
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• 제30권5호
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• pp.270-275
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• 2017

Current progress in the development of semiconductor technology in applications involving high electron mobility transistors (HEMT) and power devices is hindered by the lack of adequate ways todissipate heat generated during device operation. Concurrently, electronic devices that use gallium nitride (GaN) substrates do not perform well, because of the poor heat dissipation of the substrate. Suggested alternatives for overcoming these limitations include integration of high thermal conductivity material like diamond near the active device areas. This study will address a critical development in the art of GaN on diamond (GOD) structure by designing for ideal heat dissipation, in order to create apathway with the least thermal resistance and to improve the overall ease of integrating diamond heat spreaders into future electronic devices. This research has been carried out by means of heat transfer simulation, which has been successfully demonstrated by a finite-element method.

• 한국정밀공학회지
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• 제25권9호
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• pp.32-37
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• 2008

Freestanding hydride vapor phase epitaxy grown GaN(Gallium Nitride) substrates subjected to various polishing methods were characterized for their surface and subsurface conditions, Although CMP(Chemical Mechanical Polishing) is one of the best approaches for reducing scratches and subsurface damages, the removal rate of Ga-polar surface in CMP is insignificant($0.1{\sim}0.3{\mu}m$/hr) as compared with that of N-polar surface, Therefore, conventional MP(Mechanical Polishing) is commonly used in the GaN substrate fabrication process, MP of (0001) surface of GaN has been demonstrated using diamond slurries with different abrasive sizes, Diamond abrasives of size ranging from 30nm to 100nm were dispersed in ethylene glycol solutions and mineral oil solutions, respectively. Significant change in the surface roughness ($R_a$ 0.15nm) and scratch-free surface were obtained by diamond slurry of 30nm in mean abrasive size dispersed in mineral oil solutions. However, MP process introduced subsurface damages confirmed by TEM (Transmission Electronic Microscope) and PL(Photo-Luminescence) analysis.

• 제어로봇시스템학회논문지
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• 제8권5호
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• pp.419-424
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• 2002

After the patterning and probe process of wafer have been achieved, the dicing processing is necessary to separate chips from a wafer. The dicing process cuts a semiconductor wafer to lengthwise and crosswise directions to make many chips. The existing general dicing method is the mechanical cutting using a narrow circular rotating blade impregnated diamond particles or laser cutting. Inferior goods can be made by the mechanical or laser cutting unless several parameters such as blade, wafer, cutting water and cutting conditions are properly set. Moreover, we can not apply these general dicing method to that of GaN wafer, because the GaN wafer is harder than general semiconductor wafers such as GaAs, GaAsP, AIGaAs and so forth. In order to overcome these problems, this paper describes a new wafer dicing method using fixed diamond scriber and precision servo mechanism.

• 대한기계학회논문집A
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• 제27권8호
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• pp.1309-1316
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• 2003

The general dicing process cuts a semiconductor wafer to lengthwise and crosswise direction by using a rotating circular diamond blade. But products with inferior quality are produced under the influence of several parameters in dicing process such as blade, wafer, cutting water and cutting conditions. Moreover we can not apply this dicing method to GaN wafer, because the GaN wafer is harder than the other wafer such as SiO2, GaAs, GaAsP, and AlGaAs. In order to overcome this problem, development of a new dicing process and determination of dicing parameters are necessary. This paper describes a new wafer dicing method using fixed diamond scriber and precision servo mechanism and determination of several parameters - scribing depth, scribing force, scriber inclined angle, scribing speed, and factor for scriber replacement - for a new dicing machine using scriber.

• 전자통신동향분석
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• 제33권6호
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• pp.12-23
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• 2018

In this paper, we review the technical trends of diamond and gallium oxide ($Ga_2O_3$) semiconductor technologies among ultra-wide bandgap semiconductor technologies for harsh environments. Diamond exhibits some of the most extreme physical properties such as a wide bandgap, high breakdown field, high electron mobility, and high thermal conductivity, yet its practical use in harsh environments has been limited owing to its scarcity, expense, and small-sized substrate. In addition, the difficulty of n-type doping through ion implantation into diamond is an obstacle to the normally-off operation of transistors. $Ga_2O_3$ also has material properties such as a wide bandgap, high breakdown field, and high working temperature superior to that of silicon, gallium arsenide, gallium nitride, silicon carbide, and so on. In addition, $Ga_2O_3$ bulk crystal growth has developed dramatically. Although the bulk growth is still relatively immature, a 2-inch substrate can already be purchased, whereas 4- and 6-inch substrates are currently under development. Owing to the rapid development of $Ga_2O_3$ bulk and epitaxy growth, device results have quickly followed. We look briefly into diamond and $Ga_2O_3$ semiconductor devices and epitaxy results that can be applied to harsh environments.

• 한국전기전자재료학회논문지
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• 제28권12호
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• pp.776-780
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• 2015

In this paper, we have studied the effect of mechanical polishing to Ga-polar face for reducing the wafer bowing and strain in free-standing GaN. After the mechanical polishing to Ga-polar face, the bowing of the free-standing GaN substrate significantly decreased with increasing the size of diamond slurry, and eventually changed the bowing direction from concave to convex. Furthermore, the full width at half maximum (FWHM) of high-resolution X-ray diffraction (HR-XRD) were decreased, especially the FWHM of (1 0 2) reflection for $1.0{\mu}m$ size of diamond slurry was significantly decreased from 630 to 203 arcsec. In the case, we confirmed that the compressive strain in Ga-polar face was fully released by Raman measurement.

• 한국산학기술학회논문지
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• 제7권6호
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• pp.1047-1055
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• 2006

필드이온빔(FIB) 가공기를 써서 초고강도의 벌크다이아몬드를 가공하기 위해 이온 소오스의 종류와 가공 조건에 따른 나노급 미세 선폭의 최적조건을 알아보고 이에 근거한 2차원적인 텍스트의 가공과 3차원적인 박막요소의 가공을 시도하였다. 다이아몬드 기판과 실리콘 기판을 Ga과 $H_2O$ 소오스를 이용하는 FIB를 써서 30 kV 빔 전류를 10 pA $\sim$ 5 nA로 변화시키면서 패터닝하고 이때 각각 20 ${\mu}m$ 길이로 생성되는 선형 패턴의 선폭, 깊이, 에치속도, 에치형상, 깊이선폭비 (aspect ratio)를 확인하였다. 다이아몬드도 실리콘 기판과 마찬가지로 나노급 패턴의 형성이 가능하였다. $H_2O$ 소오스를 채용한 경우가 에치 깊이가 2배 정도 증가하였으며 동일한 가공 조건에서는 실리콘에 비해 다이아몬드의 에치 선폭이 감소는 경향이 있었다. 특히 다이아몬드는 절연성 때문에 차지가 축적되어 가공 중 이온빔이 불안정해지는 문제가 있었으나 차지 중화 모드를 이용하여 성공적으로 sub-100 nm급 선폭의 미세 가공이 가능하였다. 확인된 선폭가공 조건에 근거하여 2차원적으로 0.3carat의 보석용 다이아몬드의 거들부에 300여개의 글자를 FIB를 활용하여 선폭 240 nm정도로 명확히 기록하는 것이 가능하였다. $Ga^+$이온과 30 eV-30 pA로 조건에서 비교적 넓은 선폭과 Z축 depth 고정범위에서 많은 개인정보의 기록이 영구적으로 가능하였으며 전자현미경으로 재생이 가능하였다. 3차원적으로 두께 $1{\mu}m$의 박막요소를 FIB가공과 백금 용접으로 떼어낸 후 FIB가공으로 두께가 100 nm가 되도록 한 후 투과전자현미경을 이용하여 성분 분석을 하는 것이 성공적으로 수행될 수 있었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.292-292
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• 2014

Wide band gap semiconductors, such as III-nitrides (GaN, AlN, InN, and their alloys), SiC, and diamond are expected to play an important role in the next-generation electronic devices. Specifically, GaN-based high electron mobility transistors (HEMTs) have been targeted for high power, high frequency, and high temperature operation electronic devices for mobile communication systems, radars, and power electronics because of their high critical breakdown fields, high saturation velocities, and high thermal conductivities. For the stable operation, high power, high frequency and high breakdown voltage and high current density, the fabrication methods have to be optimized with considerable attention. In this study, low ohmic contact resistance and smooth surface morphology to AlGaN/GaN on 2 inch c-plane sapphire substrate has been obtained with stepwise annealing at three different temperatures. The metallization was performed under deposition of a composite metal layer of Ti/Al/Ni/Au with thickness. After multi-layer metal stacking, rapid thermal annealing (RTA) process was applied with stepwise annealing temperature program profile. As results, we obtained a minimum specific contact resistance of $1.6{\times}10^{-7}{\Omega}cm2$.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.222-222
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• 2000

The general dicing process cuts a semiconductor wafer to lengthwise and crosswise direction by using a rotating circular diamond blade. But inferior goods are made under the influence of several parameters in dicing such as blade, wafer, cutting water and cutting conditions. Moreover we can not applicable this dicing method to GaN wafer, because the GaN wafer is harder than the other wafer as GaAs. In older to overcome this problem, a new dicing process is necessary. This paper describes a new machine using scriber and precision servo mechanism in order to dice a semiconductor wafer.