• 제목/요약/키워드: GaAs Bonding System

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DeviceNet 을 채용한 GaAs 본딩 시스템의 통합 제어기술 (Integration and Control Technology of GaAs Bonding System using DeviceNet)

  • 송준엽;이승우;임선종;김원경;배영걸
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2004년도 추계학술대회 논문집
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    • pp.1376-1379
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    • 2004
  • This study is designed integration and control system of GaAs bonding system consisted of multi-processing using DeviceNet and GEM-Protocol. Developing bonding system is composed of resin coating, pre-baking pre-aligner, bonding, material handler(flip robot), and wafer cassette, etc. This system has process-fluent of each a process and share information using GEM-protocol. This study devised virtual bonding simulator to control and to monitor bonding system efficiently. Also we can verify optimizing of system previously through a virtual bonding simulator.

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AlGaAs합금의 Al 도핑농도에 대한 효과 (Effect on Al Concentration of AlGaAs Ternary Alloy)

  • 강병섭
    • 반도체디스플레이기술학회지
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    • 제20권4호
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    • pp.125-129
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    • 2021
  • We investigated the electronic property and atomic structure for chalcopyrite (CH) AlxGa1-xAs semiconductor by using first-principles FPLMTO method. The CH-AlxGa1-xAs exhibits a p-type semiconductor with a direct band-gap. For low Al concentration unoccupied hole-carriers are induced, but for high Al concentration it is formed a localized bonding or anti-bonding state below Fermi level. The hybridization of Al(3s)-Ga(4s, or 4p) is larger than that of Al(3s)-As(4s, or 4p). And the Al film on As-terminated surface, Al/AsGa(001), is more energetically favorable one than that on Ga-terminated (001) surface. Consequently, the band-gap of CH-AlxGa1-xAs system increases exponentially with increasing Al concentration. The change of lattice parameter is shown two different configurations with increasing Al concentration. The calculated lattice parameters for CH-AlxGa1-xAs system are compared to the experimental ones of zinc-blend GaAs and AlAs.

GaAs Wafer 접합용 본딩시스템 개발 (Development of Automatic Bonding System for GaAs Wafer)

  • 송준엽;강재훈;이창우;하태호;지원호;김원경
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 추계학술대회 논문집
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    • pp.427-431
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    • 2005
  • In this study, 6' GaAs wafer bonding system is designed and optimized to bond 6 inches device wafer and material wafer. Bonding process is performed in vacuum environment and resin is used to bond two wafers. Vacuum module and double heating mechanisms are adopted to minimize wafer warpage and void. Structure and heat transfer analysis, et al of the core modules review the designed mechanisms are very effective in performance improvement. As a result, high productivity (tack time cut-down) and stabilized process can be obtained by reducing breakage failure of wafer.

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[InAs/GaSb] 응력 초격자에 기초한 [320×256]-FPA 적외선 열영상 모듈 제작 (Fabrication of [320×256]-FPA Infrared Thermographic Module Based on [InAs/GaSb] Strained-Layer Superlattice)

  • 이상준;노삼규;배수호;정한
    • 한국진공학회지
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    • 제20권1호
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    • pp.22-29
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    • 2011
  • InAs/GaSb 제2형 응력초격자(SLS)를 활성층에 탑재한 [$320{\times}256$] 초점면 배열(FPA) 적외선 열영상 모듈을 제작하고 열영상을 구현하였다. p-i-n형으로 설계된 소자의 활성층(i) 구조는 300 주기의 [13/7]-ML [InAs/GaSb]-SLS로 구성되어 있고, p와 n 전극층에는 각각 60주기의 [InAs:Be/GaSb]-SLS와 115 주기의 [InAs:Si/GaSb]-SLS 구조를 채용하였다. 시험소자의 광반응(PR) 스펙트럼으로부터 피크 파장(${\lambda}_p$)과 차단 파장(${\lambda}_{co}$)은 각각 ${\sim}3.1/2.7{\mu}m$${\sim}3.8{\mu}m$이고 180 K 온도까지 동작을 확인하였다. 단위 화소의 간격/메사는 $30/24{\mu}m$ 규격으로 설계되었으며, [$320{\times}256$]-FPA는 표준 광묘화법으로 제작하였다. $18/10{\mu}m$의 In-bump/UBM 공정과 flip-chip 결합 기술을 적용하여 FPA-ROIC 열영상 모듈을 완성하였으며, 중적외선용 영상구동 회로 및 S/W를 활용하여 열영상을 시연하였다.

A Wafer Level Packaged Limiting Amplifier for 10Gbps Optical Transmission System

  • Ju, Chul-Won;Min, Byoung-Gue;Kim, Seong-Il;Lee, Kyung-Ho;Lee, Jong-Min;Kang, Young-Il
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권3호
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    • pp.189-195
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    • 2004
  • A 10 Gb/s limiting amplifier IC with the emitter area of $1.5{\times}10{\mu}m^2$ for optical transmission system was designed and fabricated with a AIGaAs/GaAs HBTs technology. In this stud)', we evaluated fine pitch bump using WL-CSP (Wafer Level-Chip Scale Packaging) instead of conventional wire bonding for interconnection. For this we developed WL-CSP process and formed fine pitch solder bump with the $40{\mu}m$ diameter and $100{\mu}m$ pitch on bonding pad. To study the effect of WL-CSP, electrical performance was measured and analyzed in wafer and package module using WL-CSP. In a package module, clear and wide eye diagram openings were observed and the riselfall times were about 100ps, and the output" oltage swing was limited to $600mV_{p-p}$ with input voltage ranging from 50 to 500m V. The Small signal gains in wafer and package module were 15.56dB and 14.99dB respectively. It was found that the difference of small signal gain in wafer and package module was less then 0.57dB up to 10GHz and the characteristics of return loss was improved by 5dB in package module. This is due to the short interconnection length by WL-CSP. So, WL-CSP process can be used for millimeter wave GaAs MMIC with the fine pitch pad.