• Title/Summary/Keyword: GF($2^{m}$ )체

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An Area-efficient Design of ECC Processor Supporting Multiple Elliptic Curves over GF(p) and GF(2m) (GF(p)와 GF(2m) 상의 다중 타원곡선을 지원하는 면적 효율적인 ECC 프로세서 설계)

  • Lee, Sang-Hyun;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2019.05a
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    • pp.254-256
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    • 2019
  • 소수체 GF(p)와 이진체 $GF(2^m)$ 상의 다중 타원곡선을 지원하는 듀얼 필드 ECC (DF-ECC) 프로세서를 설계하였다. DF-ECC 프로세서의 저면적 설와 다양한 타원곡선의 지원이 가능하도록 워드 기반 몽고메리 곱셈 알고리듬을 적용한 유한체 곱셈기를 저면적으로 설계하였으며, 페르마의 소정리(Fermat's little theorem)를 유한체 곱셈기에 적용하여 유한체 나눗셈을 구현하였다. 설계된 DF-ECC 프로세서는 스칼라 곱셈과 점 연산, 그리고 모듈러 연산 기능을 가져 다양한 공개키 암호 프로토콜에 응용이 가능하며, 유한체 및 모듈러 연산에 적용되는 파라미터를 내부 연산으로 생성하여 다양한 표준의 타원곡선을 지원하도록 하였다. 설계된 DF-ECC는 FPGA 구현을 하드웨어 동작을 검증하였으며, 0.18-um CMOS 셀 라이브러리로 합성한 결과 22,262 GEs (gate equivalences)와 11 kbit RAM으로 구현되었으며, 최대 100 MHz의 동작 주파수를 갖는다. 설계된 DF-ECC 프로세서의 연산성능은 B-163 Koblitz 타원곡선의 경우 스칼라 곱셈 연산에 885,044 클록 사이클이 소요되며, B-571 슈도랜덤 타원곡선의 스칼라 곱셈에는 25,040,625 사이클이 소요된다.

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Design of inversion and division circuit over GF($2^{m}$) (유한체 $GF(2^{m})$상의 역원계산 회로 및 나눗셈 회로 설계)

  • 조용석;박상규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.5
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    • pp.1160-1164
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    • 1998
  • In this paper, we propose a new algorithm for computing multiplicative inverses in $GF(2^{m})$ and design an inversion circuit and a division circuit using this algorithm. The algorithm used is based on Fermat's theorem. It takes around m/2 clock cycles. The hardware requirements of the inversion circuit and the division circuit using this algorithm are the same as traditional circuits except for the addition of multiplexers.

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A New Low-complexity Bit-parallel Normal Basis Multiplier for$GF(2^m) $ Fields Defined by All-one Polynomials (All-One Polynomial에 의해 정의된 유한체 $GF(2^m) $ 상의 새로운 Low-Complexity Bit-Parallel 정규기저 곱셈기)

  • 장용희;권용진
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.1_2
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    • pp.51-58
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    • 2004
  • Most of pubic-key cryptosystems are built on the basis of arithmetic operations defined over the finite field GF$GF(2^m)$ .The other operations of finite fields except addition can be computed by repeated multiplications. Therefore, it is very important to implement the multiplication operation efficiently in public-key cryptosystems. We propose an efficient bit-parallel normal basis multiplier for$GF(2^m)$ fields defined by All-One Polynomials. The gate count and time complexities of our proposed multiplier are lower than or equal to those of the previously proposed multipliers of the same class. Also, since the architecture of our multiplier is regular, it is suitable for VLSI implementation.

Hardware Design of Elliptic Curve processor Resistant against Simple Power Analysis Attack (단순 전력분석 공격에 대처하는 타원곡선 암호프로세서의 하드웨어 설계)

  • Choi, Byeong-Yoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.1
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    • pp.143-152
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    • 2012
  • In this paper hardware implementation of GF($2^{191}$) elliptic curve cryptographic coprocessor which supports 7 operations such as scalar multiplication(kP), Menezes-Vanstone(MV) elliptic curve cipher/decipher algorithms, point addition(P+Q), point doubling(2P), finite-field multiplication/division is described. To meet structure resistant against simple power analysis, the ECC processor adopts the Montgomery scalar multiplication scheme which main loop operation consists of the key-independent operations. It has operational characteristics that arithmetic units, such GF_ALU, GF_MUL, and GF_DIV, which have 1, (m/8), and (m-1) fixed operation cycles in GF($2^m$), respectively, can be executed in parallel. The processor has about 68,000 gates and its simulated worst case delay time is about 7.8 ns under 0.35um CMOS technology. Because it has about 320 kbps cipher and 640 kbps rate and supports 7 finite-field operations, it can be efficiently applied to the various cryptographic and communication applications.

A Design of Circuit for Computing Multiplication in Finite Fields GF($2^m$) (유한체 GF($2^m$)상의 승산기 설계에 관한 연구)

  • 김창규;이만영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.14 no.3
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    • pp.235-239
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    • 1989
  • A multiplier is proposed for computing multiplication of two arbitrary elements in the finite fields GF($2^m$), and the operation process is described step by step. The modified type of the circuit which is constructed with m-stage feedgack shift register, m-1 flip-flop, m AND gate, and m-input XOR gate is presented by referring to the conventional shift-register multiplier. At the end of mth shift, the shift-register multiplier stores the product of two elements of GF($2^m$); however the proposed circuit in this paper requires m-1 clock times from first input to first output. This circuit is simpler than cellulra-array or systolic multiplier and moreover it is faster than systolic multiplier.

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Fast GF(2m) Multiplier Architecture Based on Common Factor Post-Processing Method (공통인수 후처리 방식에 기반한 고속 유한체 곱셈기)

  • 문상국
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.6
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    • pp.1188-1193
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    • 2004
  • So far, there have been grossly 3 types of studies on GF(2m) multiplier architecture, such as serial multiplication, array multiplication, and hybrid multiplication. Serial multiplication method was first suggested by Mastrovito (1), to be known as the basic CF(2m) multiplication architecture, and this method was adopted in the array multiplier (2), consuming m times as much resource in parallel to extract m times of speed. In 1999, Paar studied further to get the benefit of both architecture, presenting the hybrid multiplication architecture (3). However, the hybrid architecture has defect that only complex ordo. of finite field should be used. In this paper, we propose a novel approach on developing serial multiplier architecture based on Mastrovito's, by modifying the numerical formula of the polynomial-basis serial multiplication. The proposed multiplier architecture was described and implemented in HDL so that the novel architecture was simulated and verified in the level of hardware as well as software. The implemented GF(2m) multiplier shows t times as fast as the traditional one, if we modularized the numerical expression by t number of parts.

Efficient Implementations of Index Calculation Methods of Elliptic Curves using Weil's Theorem (Weil 정리를 이용한 효율적인 타원곡선의 위수 계산법의 구현)

  • Kim, Yong-Tae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.11 no.7
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    • pp.693-700
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    • 2016
  • It is important that we can calculate the order of non-supersingular elliptic curves with large prime factors over the finite field GF(q) to guarantee the security of public key cryptosystems based on discrete logarithm problem(DLP). Schoof algorithm, however, which is used to calculate the order of the non-supersingular elliptic curves currently is so complicated that many papers are appeared recently to update the algorithm. To avoid Schoof algorithm, in this paper, we propose an algorithm to calculate orders of elliptic curves over finite composite fields of the forms $GF(2^m)=GF(2^{rs})=GF((2^r)^s)$ using Weil's theorem. Implementing the program based on the proposed algorithm, we find a efficient non-supersingular elliptic curve over the finite composite field $GF(2^5)^{31})$ of the order larger than $10^{40}$ with prime factor larger than $10^{40}$ using the elliptic curve $E(GF(2^5))$ of the order 36.

Modular Multiplier based on Cellular Automata Over $GF(2^m)$ (셀룰라 오토마타를 이용한 $GF(2^m)$ 상의 곱셈기)

  • 이형목;김현성;전준철;유기영
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.1_2
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    • pp.112-117
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    • 2004
  • In this paper, we propose a suitable multiplication architecture for cellular automata in a finite field $GF(2^m)$. Proposed least significant bit first multiplier is based on irreducible all one Polynomial, and has a latency of (m+1) and a critical path of $ 1-D_{AND}+1-D{XOR}$.Specially it is efficient for implementing VLSI architecture and has potential for use as a basic architecture for division, exponentiation and inverses since it is a parallel structure with regularity and modularity. Moreover our architecture can be used as a basic architecture for well-known public-key information service in $GF(2^m)$ such as Diffie-Hellman key exchange protocol, Digital Signature Algorithm and ElGamal cryptosystem.

An Architecture of the Fast Parallel Multiplier over Finite Fields using AOP (AOP를 이용한 유한체 위에서의 고속 병렬연산기의 구조)

  • Kim, Yong-Tae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.1
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    • pp.69-79
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    • 2012
  • In this paper, we restrict the case as m odd, n=mk, and propose and explicitly exhibit the architecture of a new parallel multiplier over the field GF($2^m$) with a type k Gaussian period which is a subfield of the field GF($2^n$) implements multiplication using the parallel multiplier over the extension field GF($2^n$). The complexity of the time and area of our multiplier is the same as that of Reyhani-Masoleh and Hasan's multiplier which is the most efficient among the known multipliers in the case of type IV.

A Fast Diverse Calculation Method over Finite Field GF($2^m$) (유한체 GF($2^m$)상에서의 빠른 역원계산 기법)

  • 박정식;안금혁;김영길;장청룡
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 1996.11a
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    • pp.145-150
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    • 1996
  • 정보보호기법을 적용한 다양한 서비스의 구현에 있어서는 적용기법에서 채택한 암호학적 연산에 의해 그 실용성이 종속하게 되며 이러한 실용화를 위한 하드웨어 또는 소프트웨어적 구현기법에 관한 많은 연구가 진행되고 있다. 본 논문에서는 유한체 GF(2$^{m}$ )상에서의 역원계산을 효율적이며 신속하게 처리할 수 있는 방법에 관해서 다루고 있다. 본 논문에서 제안하는 방법은 정규기저를 이용하여 임의의 유한체위에 적용 가능하도록 설계된 기법이다. 본 논문에서의 제안 방법은 이미 알려진 Itoh의 방법보다 대부분의 정수에 대하여 효율적임을 보인다.

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