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http://dx.doi.org/10.6109/jkiice.2012.16.1.143

Hardware Design of Elliptic Curve processor Resistant against Simple Power Analysis Attack  

Choi, Byeong-Yoon (동의대학교 컴퓨터공학과)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.16, no.1, 2012 , pp. 143-152 More about this Journal
Abstract
In this paper hardware implementation of GF($2^{191}$) elliptic curve cryptographic coprocessor which supports 7 operations such as scalar multiplication(kP), Menezes-Vanstone(MV) elliptic curve cipher/decipher algorithms, point addition(P+Q), point doubling(2P), finite-field multiplication/division is described. To meet structure resistant against simple power analysis, the ECC processor adopts the Montgomery scalar multiplication scheme which main loop operation consists of the key-independent operations. It has operational characteristics that arithmetic units, such GF_ALU, GF_MUL, and GF_DIV, which have 1, (m/8), and (m-1) fixed operation cycles in GF($2^m$), respectively, can be executed in parallel. The processor has about 68,000 gates and its simulated worst case delay time is about 7.8 ns under 0.35um CMOS technology. Because it has about 320 kbps cipher and 640 kbps rate and supports 7 finite-field operations, it can be efficiently applied to the various cryptographic and communication applications.
Keywords
ECC cryptography; Public-key cryptography; Power analysis attack; Scalar Multiplication; SoC;
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