• Title/Summary/Keyword: GATE

Search Result 6,352, Processing Time 0.035 seconds

gate stack구조를 이용한 LTPS TFT의 전기적 특성 분석

  • Jeon, Byeong-Gi;Jo, Jae-Hyeon;Lee, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2009.11a
    • /
    • pp.59-59
    • /
    • 2009
  • The efficiency of CMOS technology has been developed in uniform rate. However, there was a limitation of reducing the thickness of Gate-oxide since the thickness of Gate Dielectric is also reduced so an amount of leakage current is grow. In order to solve this problem, the semiconductor device which has a dual gate is used widely. This paper presents a method and a necessity for making the Gate Stack of TFT. Before Using test devices to measure values, stacking $SiN_x$ on a wafer test was conducted.

  • PDF

Gate Freezing, Gate Sizing, and Buffer Insertion for reducing Glitch Power Dissipation (단일화된 게이트 프리징, 사이징 및 버퍼삽입에 의한 저 전력 최적화 알고리즘)

  • Lee, Hyung-Woo;Shin, Hak-Gun;Kim, Ju-Ho
    • Proceedings of the IEEK Conference
    • /
    • 2004.06b
    • /
    • pp.455-458
    • /
    • 2004
  • We present an efficient heuristic algorithm to reduce glitch power dissipation in combinational circuits. In this paper, the total number of glitches are reduced by replacing existing gates with functionally equivalent ones and by gate sizing which classified into three types and by buffer insertion which classified into two types. The proposed algorithm combines gate freezing, gate sizing. and buffer insertion into a single optimization process to maximize the glitch reduction. Our experimental results show an average of $67.8\%$ glitch reduction and $32.0\%$ power reduction by simultaneous gate freezing, gate sizing, and buffer insertion.

  • PDF

Gate Location Design of an Automobile Junction Box with Integral Hinges (복합힌지를 갖는 차량용 정션박스의 게이트 위치설계)

  • 김홍석
    • Transactions of Materials Processing
    • /
    • v.12 no.2
    • /
    • pp.134-140
    • /
    • 2003
  • Polymers such as polypropylene or polyethylene offer a unique feature of producing an integral hinge, which can flex over a million times without causing a failure. With such advantage manufacturing, time and cost required at the assembly stage can be eliminated by injecting the whole part as one piece. However, due to increased fluidity resistance at hinges during molding, several defects such as short shot or premature hinge failure can occur with the improper selection of gate locations. Therefore, it is necessary to optimize flow balancer in injection molding of part with hinges before actually producing molds. In this paper, resin flow patterns depending on several gate positions were investigated by numerical analyses of a simple strip part with a hinge. As a result, we found that the properly determined gate location leads to better resin flow and shorter hesitation time. Finally, injection molding tryouts using a mold that was designed one of the proposed gate systems were conducted using polypropylene that contained 20% talc. The experiment showed that hinges without defects could be produced by using the designed gate location.

A Study on the New Discharge AND Gate and Drive Scheme for the Cost Down of the PDPs (PDP의 가격절감을 위한 새로운 방전 AND Gate 및 구동기술에 관한 연구)

  • 염정덕
    • The Transactions of the Korean Institute of Electrical Engineers C
    • /
    • v.52 no.6
    • /
    • pp.267-273
    • /
    • 2003
  • The plasma display panel with the electrode structure of new discharge AND gate and its driving scheme were proposed and the driving system for experiment was developed. And operation of these discharge AND gate was verified by the experiment of PDP addressing with floating electrode. This discharge AND gate operated by the operation speed of 8$mutextrm{s}$ and the operation margin of 100V. The address operation margin of 10V also obtained. It was known to be able to control the discharge of the adjoining scan electrode accurately. Because proposed method uses the DC discharge the control of the discharge can be facilitated compared with conventional discharge AND gate. Moreover, because the input discharge and the output discharge of discharge gate are separate, the display discharge can be prevented from passing discharge gates. Therefore, it is possible to apply to the large screen plasma display panel. And the decrease of contrast ratio does not occur because the scanning discharge does not influence the picture quality.

Development of the Automatic Design System for Hydraulic Gate (취수 갑문 설계 자동화 개발)

  • Lee, Hoo-Gwang;Choi, Jae-Seung;Hwang, Suk-Hwan
    • Journal of the Korean Society for Precision Engineering
    • /
    • v.18 no.6
    • /
    • pp.127-132
    • /
    • 2001
  • An automatic design system for a hydraulic gate has been developed to cut down the time for the design calculation and to optimize its design. It is oriented to the radial gate which is the simplest, most reliable, least expensive and most widely used hydraulic gate. This system is composed of data input, strength computation and result display modules with databases of the properties of components and materials. In this development, the existing intricate design procedure has been changed to the straightforward procedure without assumption of weight. With this code, the design time of the radial gate could be reduced below one thirtieth in comparison with manual work and the optimum design could be accomplished easily.

  • PDF

Application of Solar Energy System for Agricutular Facility (농업용 수리시설의 태양광 시스템 적용)

  • Chung, Kwang-Kun;Lee, Kwang-Ya;Kim, Hea-Do
    • Proceedings of the Korea Water Resources Association Conference
    • /
    • 2006.05a
    • /
    • pp.1964-1969
    • /
    • 2006
  • In order to solve the problem of the existing gate it developed the solar energy gate. The solar energy gate quotient a friction force from the area contact which will call improved with line contact and it diminished. Because of the result, The operation power of the gate came to be small and the small-sized of the motor was possible. From the small-sized of the motor, the solar energy system introduction was possible and the expense for the production establishment of the gate was diminished. From KRC in 2005 demonstration it establishes the solar energy gate in nationwide 50 places and characteristic the monitoring efficiently.

  • PDF

Development of Eco-Friendly Self-Controlled Gate (친환경성을 고려한 무동력 자동수문 개발)

  • Chung, Kwang-Kun;Lee, Kwang-Ya;Kim, Hae-Do
    • Proceedings of the Korea Water Resources Association Conference
    • /
    • 2006.05a
    • /
    • pp.546-551
    • /
    • 2006
  • It considered the population decrease and becoming older in age of the Rural area and operates by unmaned-non power which self-controlled gate developed. The operational principal used a buoyancy and when water level in the canal arrived to the set water level, in order for gate to be opened. The plate in order to fix to the shape in the canal which begs, it did in the quadrilateral and the rainfall it is sour intensively, canal bank comfort plate in order to ascend completely, it designed. The result which establishes Self-controlled gate, the gate upstream 1km until degree there was water level synergistic effect. It developed 4 as the research project and it established in Ah San city, and it establishes the Self-controlled gate of $B3.2m{\times}H2.4m$ size in Damyang and 100ha it does water supply in the rice field.

  • PDF

터미널 게이트의 유비쿼터스 연계효과에 대한 연구

  • Kim, Hyeon
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
    • /
    • 2007.12a
    • /
    • pp.309-310
    • /
    • 2007
  • 컨테이너터미널의 Gate는 컨테이너의 출입구를 의미하는 것 외에 컨테이너 정보의 최초 입력점이라는 중요한 의미를 가지고 있다. 따라서 컨테이너 정보의 정확한 습득을 위해 다양한 컨테이너 변호 인식방법이 사용되고 있으며, 이러한 적용방법에 따라 Gate의 생산성에도 많은 차이가 발생하고 있다. 최근, 정부의 u-IT사업추진에 따라 적용되기 시작한 RFID를 이용한 Gate자동화 방식은 기존시스템에 대한 새로운 접근을 요구하게 되었다. RFID를 이용함에 따라 각 시스템의 단점을 보완하는 정성적 이점과 더불어 정량적 생산성 향상이라는 기대치도 높아지게 되었다. 따라서 본 연구에서는 RFID를 이용한 Gate 자동화 시스템과 기존의 Gate시스템과의 생산성 차이를 시뮬레이션을 통해 검증함으로써 RFID 방식의 Gate를 고려하고 있는 컨테이너터미널에 관련된 정보를 제공하고자 하였다.

  • PDF

Design of Unified Trench Gate Power MOSFET for Low on Resistance and Chip Efficiency (낮은 온저항과 칩 효율화를 위한 Unified Trench Gate Power MOSFET의 설계에 관한 연구)

  • Kang, Ey-Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.26 no.10
    • /
    • pp.713-719
    • /
    • 2013
  • Power MOSFET operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. We have optimal designed planar and trench gate power MOSFET for high breakdown voltage and low on resistance. When we have designed $6,580{\mu}m{\times}5,680{\mu}m$ of chip size and 20 A current, on resistance of trench gate power MOSFET was low than planar gate power MOSFET. The on state voltage of trench gate power MOSFET was improved from 4.35 V to 3.7 V. At the same time, we have designed unified field limit ring for trench gate power MOFET. It is Junction Termination Edge type. As a result, we have obtained chip shrink effect and low on resistance because conventional field limit ring was convert to unify.

Analytical Threshold Voltage Modeling of Surrounding Gate Silicon Nanowire Transistors with Different Geometries

  • Pandian, M. Karthigai;Balamurugan, N.B.
    • Journal of Electrical Engineering and Technology
    • /
    • v.9 no.6
    • /
    • pp.2079-2088
    • /
    • 2014
  • In this paper, we propose new physically based threshold voltage models for short channel Surrounding Gate Silicon Nanowire Transistor with two different geometries. The model explores the impact of various device parameters like silicon film thickness, film height, film width, gate oxide thickness, and drain bias on the threshold voltage behavior of a cylindrical surrounding gate and rectangular surrounding gate nanowire MOSFET. Threshold voltage roll-off and DIBL characteristics of these devices are also studied. Proposed models are clearly validated by comparing the simulations with the TCAD simulation for a wide range of device geometries.