• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.5
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• pp.34-42
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• 2002

In this paper, we designed the VLSI array architecture for the high speed processing of the motion estimation used by block matching algorithm. We derived the one dimensional systolic array from the full search block matching algorithm. The data and control signals of the proposed systolic array are passed through adjacent processing element. So proposed architecture has temporal and spatial locality. The I/O ports exists only in the first and last processing elements of the array. This architecture has low pin counts and modular expandability. So the proposed array architecture can be cascaded for different block size and search range.

• Journal of Korea Multimedia Society
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• v.3 no.4
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• pp.372-379
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• 2000

In this paper, we propose a fast variable-size block matching algorithm for motion estimation based on bit-pattern. Motion estimation in the proposed algorithm is performed after the representation of image sequence is transformed 8bit pixel values into 1bit ones depending on the mean value of search block, which brings a short searching time by reducing the computational complexity. Moreover, adaptive searching methods according to the motion information of the block make the procedure of motion estimation efficient by eliminating an unnecessary searching of low motion block and deepening a searching procedure in high motion block. Experimental results show that the proposed algorithm provides better performance-0.5dB PSNR improvement-than full search block matching algorithm with a fixed block size.

• Proceedings of the Korean Information Science Society Conference
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• 1999.10b
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• pp.245-247
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• 1999

본 논문은 MPEG-2 TM 5 비디오 부호기의 움직임 예측(motion estimation) 처리과정을 소개한다. 비디오에는 공간의 중복성보다 시간의 중복성이 훨씬 많다. 따라서 시간의 중복성을 찾아내는 것이 압축의 효율을 높이는 중요한 척도가 된다. MPEG-2 부호기는 움직임 예측 알고리즘을 사용하여 시간의 중복성을 줄여 압축 효율을 높인다. 움직임 예측은 참조 블록의 위치로부터 원래 블록의 위치를 추정하여 최적의 움직임 벡터를 찾는 과정이다. PMEG-2에서의 움직임 예측은 full search 알고리즘을 사용하여 마지막으로 hlaf pel로 산출한다. 본 논문에서는 MPEG-2 움직임 예측 과정을 frame estimation, field estimation, picture 타입에 따른 estimation, 움직임 예측을 위한 블록 매칭 알고리즘, full search 방법 및 움직임 벡터에 대하여 소개한다.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.585-588
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• 2004

This paper describes design and verification of the motion estimation and compensation unit using full search algorithm. Video processor is the key device of video communication systems. Motion estimation is the key module of video processor. The technologies of motion estimation and compensation unit are the core technologies for wireless video telecommunications system, portable multimedia systems. In this design, Verilog simulator and logic synthesis tools are used for hardware design and verification. In this paper, motion estimation and compensation unit are designed using FPGA, coded in Verilog HDL, and simulated and verified using Xilinx FPGA.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.669-672
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• 1998

In this paper, w epropose a fast fractal coding method based on correlation coefficients of subblocks in input image. In the proposed method, domain pool is selected based on correlation analysis of input image and the isometry transform for each block is chosen based on the IFS method. To investigate the performance of the proposed method, we compared image quality and encoding time with full search PIFS method and jacquin's PIFS method. Experimental results show that proposed method yields nearly the same performance in PSNR, and its encoding time is reduced for images size of 512*512 compared with full search PIFS method and jacquin's PIFS method.

• Journal of the Korean Institute of Intelligent Systems
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• v.14 no.4
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• pp.418-423
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• 2004

The motion estimation algorithm based block matching is a widely used in the international standards related to video compression, such as the MPEG series and H.26x series. Full search algorithm(FA) ones of this block matching algorithms is usually impractical because of the large number of computations required for large search region. Fast search algorithms and conventional binary block matching algorithms reduce computational complexity and data processing time but this algorithms have disadvantages that is less performance than full search algorithm. This paper presents new Boolean matching algorithm, called BCBM(Bit Converted Boolean Matching). Proposed algorithm has performance closed to the FA by Boolean only block matching that may be very efficiently implemented in hardware for real time video communication. Simulation results show that the PSNR of the proposed algorithm is about 0.08㏈ loss than FA but is about 0.96∼2.02㏈ gain than fast search algorithm and conventional Boolean matching algorithm.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.1
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• pp.8-13
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• 2008

The high peak-to-average power ratio(PAPR) of the transmitted signals is one of the major drawbacks of the orthogonal frequency division multiplexing(OFDM). The partial transmit sequences(PTS) technique can improve the PAPR statistics of the OFDM signals. However, in the PTS technique, the computational complexity to select phase weighting factors increases exponentially with the number of sub-blocks. In this paper, a search algorithm that has no limit on the values of phase weighting factors and requires no additional operations for the search is presented. To evaluate the performance, the proposed search algorithm is compared with the full search algorithm in terms of the complementary cumulative distribution function(CCDF) of the PAPR and the computational complexity. It is shown through simulations that the proposed technique can achieve significant reductions in the computational complexity with little performance degradation compared with the full search algorithm.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.3
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• pp.171-180
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• 2003

A content-based image retrieval(CBIR) system builds the image database using low-level features such as color, shape and texture and provides similar images that user wants to retrieve when the retrieval request occurs. What the user is interest in is a response time in consideration of the building time to build the index database and the response time to obtain the retrieval results from the query image. In a content-based image retrieval system, the similarity computing time comparing a query with images in database takes the most time in whole response time. In this paper, we propose the two-phase search method with the clustering technique of feature vector in order to minimize the similarity computing time. Experimental results show that this two-phase search method is 2-times faster than the conventional full-search method using original features of ail images in image database, while maintaining the same retrieval relevance as the conventional full-search method. And the proposed method is more effective as the number of images increases.

• Journal of the Korea Society of Computer and Information
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• v.29 no.4
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• pp.1-8
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• 2024

The traveling salesman problem(TSP) is one of the well known combinatorial optimization problems. Local search has been used as a method to solve TSP. Greedy Random Insertion(GRI) is known as an effective neighbor generation method for local search. GRI selects some cities from the current solution randomly and inserts them one by one into the best position of the current partial solution considering only one city at a time. We first propose another greedy neighbor generation method which is named Full Greedy Insertion(FGI). FGI determines insertion location one by one like GRI, but considers all remaining cities at once. And then we propose a method to combine GRI with FGI, in which GRI or FGI is randomly selected and executed at each iteration in simulated annealing. According to the experimental results, FGI alone does not necessarily perform very well. However, we confirmed that the combined method outperforms the existing local search methods including GRI.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.2
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• pp.66-75
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• 2010

This paper proposes an efficient method for design and implementation of the artificial intelligence (AI) of 'omok' game on the GPU. The proposed AI is designed on a cooperative structure using min-max game tree and genetic algorithm. Since the evaluation function needs intensive computation but is independently performed on a lot of candidates in the solution space, it is computed on the GPU in a massive parallel way. The implementation on NVIDIA CUDA and the experimental results show that it outperforms significantly over the CPU, in which parallel game tree and genetic algorithm on the GPU runs more than 400 times and 300 times faster than on the CPU. In the proposed cooperative AI, selective search using genetic algorithm is performed subsequently after the full search using game tree to search the solution space more efficiently as well as to avoid the thread overflow. Experimental results show that the proposed algorithm enhances the AI significantly and makes it run within the time limit given by the game's rule.