• Journal of Korea Society of Industrial Information Systems
• /
• v.18 no.5
• /
• pp.15-18
• /
• 2013

This paper presents an analog front-end for electroencephalogram(EEG) signal processing. Since EEG signals are typically weak and located at very low frequencies, it is imperative to implement an amplifier with high gain, high common-mode rejection ratio(CMRR) and good noise immunity at very low frequencies. The analog front-end of this paper consists of a programmable-gain instrumentation amplifier and a band-pass filter. A frequency chopping technique is employed to remove the low-frequency noise. The circuits were fabricated in 0.18um CMOS technology and measurements showed that the analog front-end has the maximum gain of 60dB and >100dB CMRR over the programmable gain range.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.155-158
• /
• 2005

An invesitigation on power consumption of a mobile multimedia system using OFDM and MDVS technique is reported here. Analysis and simulation are performed to find the significances of proposed Microscopic Dynamic Voltage Scaling(MDVS) tehnique[4] on digital processor in terms of power saving. A study is also made to show power reduction in mobile multimedia system by incorporating OFDM modulation scheme in RF front-end. Finally, overall power consumption by functionally distinguished blocks ie. RF front-end, digital processor and human interface unit is shown here. Total power consumption is 8.2W for 2Mbps SD-quality WCDMA multimedia video service - the power consumption of digital processor is 3.9W(48%), the power consumption of RF front-end is 3.2W (36%), and the power consumption of interface is 1.8W(16%). Power saving of applying purposed MDVS technique is 35% in digital processor, and power saving of OFDM technique is 10-12dB in RF front-end.

• Journal of Biomedical Engineering Research
• /
• v.7 no.1
• /
• pp.59-66
• /
• 1986

A prototype ultrasound sector B-scanner has been developed where the front-end hardware refers to all the necessary circuits for transmitting the ultrasound pulses into the human body and receiving the reflected echo signals from it. The front-end hardware can generally be divided into three parts, i.e., a pulse generator for insonification, a receiver which is responsible for processing of low-level analog signals, and a steering controller for driving the mechanical sector probe whose functions and design concepts are described in this paper. The front-end hardware is implemented which incorporates the following features: improvement of the axial resolution using a circuit which reduces the ring-down time, flexibility of generating time-gain compensation curve, and adoption of a one-chip microcomputer for generating the rate pulses based on the sensor output waveforms.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.9 no.2
• /
• pp.85-90
• /
• 2009

This paper presents a single supply PLC SoC ASIC with a built-in analog Front-end circuit. To achieve the low power consumption along with low cost, this PLC SoC employs fully CMOS Analog Front End (AFE) and several LDO regulators (LDOs) to provide the internal power for Logic Core, DAC and Input/output Pad driver. The receiver part of the AFE consists of Pre-amplifier, Gain Amplifier and 1 bit Comparator. The transmitter part of the AFE consists of 10 bit Digital Analog Converter and Line Driver. This SoC is implemented with 0.18 ${\mu}m$ 1 Poly 5 Metal CMOS Process. The single supply voltage is 3.3 V and the internal powers are provided using LDOs. The total power consumption is below 30 mA at stand-by mode to meet the Eco-Design requirement. The die size is 3.2 $\times$ 2.8 $mm^{2}$.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.15 no.8
• /
• pp.1805-1812
• /
• 2011

Bandpass sampling technique has an advantage that it uses lower sampling frequency than Nyquist criterion. But special care is required in choosing sampling frequency to avoid self-image overlapping in the first Nyquist region. Recently, the second-order BPS techniques which can suppress possible self-image by using an additional ADC and by employing digital signal processing have been proposed. This paper addresses a complex BPS based SDR front-end. Unlike general second-order BPS, it needs simple FIR filter to compensate delay in the second ADC. We show a method to find proper sampling frequencies to down convert RF signals selected by tunable RF filter operating in arbitrary frequency range.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.7 no.1
• /
• pp.15-20
• /
• 2012

In this paper, we designed and analysed K-band front-end module for digital microwave communication system receiver which improvement of dynamic range. We also suggested method of minimum amplified input signal level used to minimize noise figure of low-noise amplifier for High dynamic range. The designed modules consist of active mixer with conversions gain and PL-DRO with high stability and quality factor. The designed modules performance is that has the characteristics of over 54dB conversion gain, 1.3dB noise figure.

• Journal of Power Electronics
• /
• v.15 no.1
• /
• pp.202-215
• /
• 2015

This paper investigates the stability and performance of model predictive controlled active-front-end (AFE) rectifiers for energy storage systems, which has been increasingly applied in power distribution sectors and in renewable energy sources to ensure an uninterruptable power supply. The model predictive control (MPC) algorithm utilizes the discrete behavior of power converters to determine appropriate switching states by defining a cost function. The stability of the MPC algorithm is analyzed with the discrete z-domain response and the nonlinear simulation model. The results confirms that the control method of the active-front-end (AFE) rectifier is stable, and that is operates with an infinite gain margin and a very fast dynamic response. Moreover, the performance of the MPC controlled AFE rectifier is verified with a 3.0 kW experimental system. This shows that the MPC controlled AFE rectifier operates with a unity power factor, an acceptable THD (4.0 %) level for the input current and a very low DC voltage ripple. Finally, an efficiency comparison is performed between the MPC and the VOC-based PWM controllers for AFE rectifiers. This comparison demonstrates the effectiveness of the MPC controller.

• ETRI Journal
• /
• v.42 no.6
• /
• pp.943-950
• /
• 2020

We propose 8.2-GHz band radar RFICs for an 8 × 8 phased-array frequency-modulated continuous-wave receiver developed using 65-nm CMOS technology. This receiver panel is constructed using a multichip solution comprising fabricated 2 × 2 low-noise amplifier phase-shifter (LNA-PS) chips and a 4ch RX front-end chip. The LNA-PS chip has a novel phase-shifter circuit for low-voltage operation, novel active single-to-differential/differential-to-single circuits, and a current-mode combiner to utilize a small area. The LNA-PS chip shows a power gain range of 5 dB to 20 dB per channel with gain control and a single-channel NF of 6.4 dB at maximum gain. The measured result of the chip shows 6-bit phase states with a 0.35° RMS phase error. The input P1 dB of the chip is approximately -27.5 dBm at high gain and is enough to cover the highest input power from the TX-to-RX leakage in the radar system. The gain range of the 4ch RX front-end chip is 9 dB to 30 dB per channel. The LNA-PS chip consumes 82 mA, and the 4ch RX front-end chip consumes 97 mA from a 1.2 V supply voltage. The chip sizes of the 2 × 2 LNA-PS and the 4ch RX front end are 2.39 mm × 1.3 mm and 2.42 mm × 1.62 mm, respectively.

• International journal of advanced smart convergence
• /
• v.10 no.1
• /
• pp.12-23
• /
• 2021

This paper proposes a low power radio frequency receiver front-end where, in a single stage, single-balanced mixer and voltage-controlled oscillator are stacked on top of low noise amplifier and re-use the dc current to reduce the power consumption. In the proposed topology, the voltage-controlled oscillator itself plays the dual role of oscillator and mixer by exploiting a series inductor-capacitor network. Using a 65 nm complementary metal oxide semiconductor technology, the proposed radio frequency front-end is designed and simulated. Oscillating at around 2.4 GHz frequency band, the voltage-controlled oscillator of the proposed radio frequency front-end achieves the phase noise of -72 dBc/Hz, -93 dBc/Hz, and -113 dBc/Hz at 10KHz, 100KHz, and 1 MHz offset frequency, respectively. The simulated voltage conversion gain is about 25 dB. The double-side band noise figure is -14.2 dB, -8.8 dB, and -7.3 dB at 100 KHz, 1 MHz and 10 MHz offset. The radio frequency front-end consumes only 96 ㎼ dc power from a 1-V supply.

• Journal of Information Processing Systems
• /
• v.16 no.6
• /
• pp.1372-1390
• /
• 2020

An attractive user interface (UI) design with a clear user experience (UX) is the key for the success of applications. Therefore software development projects require very close collaboration between SI developers and front-end service developers. However, methodologies for software development only exist with inadequate development processes or work standards for collaboration. This survey derived 13 risk factors in developing UI/UX from 113 risk factors of IT projects through a questionnaire and factor analysis and proposed a collaboration-based UI/UX development model that can eliminate or mitigate six risks with high weights and reliability. To extract risk factors with high reliability, factor and reliability were analyzed to extract 13 major risks, and based on the expert opinions and the results of correlation analysis, UI/UX development stages were classified into planning, design, and implementation. The causal relationships between risks were verified through regression analysis. This study is the first to expertly analyze major risks based on collaboration in UI/UX development and derive a theoretical basis that can be used in project risk management. These findings are expected to provide a basis for research on development methodologies for higher levels of front-end services and to construct rational collaboration systems between SI practitioners and front-end service providers.