• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.509-510
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• 2006

FLL (Frequency Locked Loop) is the core block for high-speed transceiver. It incorporates a PLL for fine locking action, and a coarse controller for coarse locking action. A coarse controller compares frequencies coarsely and is applied to detected frequency difference directly. Compare to conventional FLL, frequency is applied to proposed FLL. Proposed FLL in this paper achieves only 5 cycles for coarse lock and total frequency locking time is 5 times faster than conventional FLL. Thus, proposed FLL is more useful to Ethernet transceiver application that requires high-speed data transfer than conventional FLL. Proposed FLL is based on $0.18{\mu}m$ process.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.2
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• pp.484-493
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• 2004

A new lightwave locking technique which can be used in tuning the wavelength of a local laser diode to the reference wavelength is presented in this paper. The optical frequency from the reference laser source and the optical frequency from the local slave VCO laser are heterodyned on a optical receiver, resulting in the 1.5GHz RF signal corresponding to the difference frequency between two input optical signals. The difference frequency is locked to the reference 1.5GHz oscillator source in off-set frequency locking loop. Using the commercialized microwave components, frequency difference detector can be easily established to lock the lightwave. The optical frequency of 1.55um laser diode which keeps the frequency off-set of 1.5GHz is locked to the input reference optical signal with the locking range of 320MHz.

• Korean Journal of Optics and Photonics
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• v.14 no.4
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• pp.351-354
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• 2003

We present a 12.5-GHz interleaved bidirectional ultra-dense wavelength-division-multiplexing transmission over a conventional single mode fiber of 80 km achieving spectral efficiency as high as 0.8-bit/s/Hz. The beat-frequency-locking method is used to stabilize the channel frequency within $\pm$200 MHz error. To facilitate the identification of multiple beat frequency signals, we use a radio-frequency spectrum analyzer. The bidirectional transmission penalty is about 0.3 dB compared with the unidirectional transmission over the same fiber.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.963-966
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• 2003

This paper proposes a new locking algorithm of the delay locked loop (DLL) which reduces the lock-acquisition time and eliminates false locking problem to enlarge the operating frequency range. The proposed DLL uses the modified phase frequency detector (MPFD) and the modified charge pump (MCP) to avoid the false locking problem. Adopting a new lock detector that measures delay between elects helps the fast lock-acquisition time greatly. The idea has been confirmed by HSPICE simulations in a 0.35-${\mu}{\textrm}{m}$ CMOS process.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3286-3292
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• 1996

An experimental results of optical requency locked loop with DFB semiconductor laser as VCO are presented. Using quadricorrelator as frequency difference detector and frequency off-set locking technique with 1GHz reference frequency, frequency locking range of 140MHz was achieved. This paper reports the design and realization details of the loop.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.6
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• pp.1037-1044
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• 2019

This study describes injection locking phenomena for multi-frequency generator design. For the design of the multi-frequency generator, we describe the basic theory of injection locking phenomenon and conduct a single injection locking experiment based on it. The experiments was conducted by applying injection signals that vibrates consistently to oscillators which vibrates unstablely compared to injection signals. Injection signal was applied using a Howland current source and circuit was designed using a Colpitts oscillator. The results of the experiment showed that each oscillator oscillates reliable when injection signals(840kHz, 500kHz) are injected. Through the results of a single injection locking experiment, it is confirmed that injection locking phenomena can be applied in the design of the multi-frequency generator.

• 전자공학회논문지 IE
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• v.46 no.1
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• pp.1-6
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• 2009

This paper presents the digital PLL architecture and design for improving the frequency detection range and locking time for wide-band frequency synthesizer applications. In this research, a wide-range digital logic quadricorrelator is used for wide-band and fast frequency detector and sigma-delta modulator with 2-bit up-down counter is adopted for DCO control. The proposed digital PLL reduces the phase noise from quantization effect and is suitable for implementation of wide-band fast-locking as well as low power features, which is in high demand for mobile multimedia applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.9
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• pp.2362-2372
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• 1996

This paper deals with the design and development of an Injection-Locking Coupled Oscillators(ILCO), which functions like phase-shifter in the Active Intergrated Phased Array Antenna(AIPAA). This linear array 2-element ILCO consists of two Injection Locking Hair-pin Resonator Oscillators(ILHRO) and an unilateral amplifier. The first and second elements of the ILCO have same frequency tuning range but locking bandwidths of 11.5MHz and 14MHz respectively. A phase shift of .DELTA..PHI.=158.4.deg.(-78.0.deg. to 80.4.deg.) could be obtained inthe second element of ILCO when the first elementof the ILCO was in the reference locking mode(.DELTA..PHI.=0.deg.). When the ILCO is applied to the AIPAA, the predicted beam scanning angle value will be 38.4.deg.. Each ILCO gives good frequency stability and lower AM, FM, and PM noise charactheristics in the mutual coupling lockingmode. The ILCO can not only play a part as the phase shifter for the AIPAA but it can also be usedas the power combining device in the mm-wave frequency range and as a part of a T/R MMIC module.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.4
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• pp.492-498
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• 2017

In this paper, we integrate a divide-by-3 injection-locked frequency divider (ILFD) in CMOS technology with a $0.18-{\mu}m$ BiCMOS process. We propose a self-injection technique that utilizes harmonic conversion to improve the locking range, phase-noise, and input sensitivity simultaneously. The proposed self-injection technique consists of an odd-to-even harmonic converter and a feedback amplifier. This technique offers the advantage of increasing the injection efficiency at even harmonics and thus realizes the low-power implementation of an odd-order division ILFD. The measurement results using the proposed self-injection technique show that the locking range is increased by 47.8% and the phase noise is reduced by 14.7 dBc/Hz at 1-MHz offset frequency with the injection power of -12 dBm. The designed divide-by-3 ILFD occupies $0.048mm^2$ with a power consumption of 18.2-mW from a 1.8-V power supply.

• Journal of information and communication convergence engineering
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• v.3 no.3
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• pp.142-145
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• 2005

In this paper, a new programmable DLL (delay locked loop) based clock synthesizer is proposed. DLL has several inherent advantages, such as no phase accumulation error, fast locking and easy integration of the loop filter. This paper proposes a new programmable DLL that includes a PFD(phase frequency detector), a LSI(lock status indicator), and a VCDL(voltage controlled delay line) to generate multiple clocks. It can generate clocks from 3 to 9 times of input clock with $2{\mu}s$ locking time. The proposed DLL operating in the frequency range of 300MHZ-900MHz is verified by the HSPICE simulation with a $0.35{\mu}m$ CMOS process.