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A Study on the Wide-band Fast-Locking Digital PLL Design  

Ahn, Tae-Won (School of Electrical Engineering, Dongyang Technical College)
Publication Information
전자공학회논문지 IE / v.46, no.1, 2009 , pp. 1-6 More about this Journal
Abstract
This paper presents the digital PLL architecture and design for improving the frequency detection range and locking time for wide-band frequency synthesizer applications. In this research, a wide-range digital logic quadricorrelator is used for wide-band and fast frequency detector and sigma-delta modulator with 2-bit up-down counter is adopted for DCO control. The proposed digital PLL reduces the phase noise from quantization effect and is suitable for implementation of wide-band fast-locking as well as low power features, which is in high demand for mobile multimedia applications.
Keywords
wide-band; fast-locking; digital PLL; frequency synthesizer; WDLQ;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
연도 인용수 순위
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