• Title/Summary/Keyword: Frequency Multiplier

Search Result 190, Processing Time 0.027 seconds

An efficient 2.5D inversion of loop-loop electromagnetic data (루프-루프 전자탐사자료의 효과적인 2.5차원 역산)

  • Song, Yoon-Ho;Kim, Jung-Ho
    • Geophysics and Geophysical Exploration
    • /
    • v.11 no.1
    • /
    • pp.68-77
    • /
    • 2008
  • We have developed an inversion algorithm for loop-loop electromagnetic (EM) data, based on the localised non-linear or extended Born approximation to the solution of the 2.5D integral equation describing an EM scattering problem. Source and receiver configuration may be horizontal co-planar (HCP) or vertical co-planar (VCP). Both multi-frequency and multi-separation data can be incorporated. Our inversion code runs on a PC platform without heavy computational load. For the sake of stable and high-resolution performance of the inversion, we implemented an algorithm determining an optimum spatially varying Lagrangian multiplier as a function of sensitivity distribution, through parameter resolution matrix and Backus-Gilbert spread function analysis. Considering that the different source-receiver orientation characteristics cause inconsistent sensitivities to the resistivity structure in simultaneous inversion of HCP and VCP data, which affects the stability and resolution of the inversion result, we adapted a weighting scheme based on the variances of misfits between the measured and calculated datasets. The accuracy of the modelling code that we have developed has been proven over the frequency, conductivity, and geometric ranges typically used in a loop-loop EM system through comparison with 2.5D finite-element modelling results. We first applied the inversion to synthetic data, from a model with resistive as well as conductive inhomogeneities embedded in a homogeneous half-space, to validate its performance. Applying the inversion to field data and comparing the result with that of dc resistivity data, we conclude that the newly developed algorithm provides a reasonable image of the subsurface.

Bit-serial Discrete Wavelet Transform Filter Design (비트 시리얼 이산 웨이블렛 변환 필터 설계)

  • Park Tae geun;Kim Ju young;Noh Jun rye
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.4A
    • /
    • pp.336-344
    • /
    • 2005
  • Discrete Wavelet Transform(DWT) is the oncoming generation of compression technique that has been selected for MPEG4 and JEPG2000, because it has no blocking effects and efficiently determines frequency property of temporary time. In this paper, we propose an efficient bit-serial architecture for the low-power and low-complexity DWT filter, employing two-channel QMF(Qudracture Mirror Filter) PR(Perfect Reconstruction) lattice filter. The filter consists of four lattices(filter length=8) and we determine the quantization bit for the coefficients by the fixed-length PSNR(peak-signal-to-noise ratio) analysis and propose the architecture of the bit-serial multiplier with the fixed coefficient. The CSD encoding for the coefficients is adopted to minimize the number of non-zero bits, thus reduces the hardware complexity. The proposed folded 1D DWT architecture processes the other resolution levels during idle periods by decimations and its efficient scheduling is proposed. The proposed architecture requires only flip-flops and full-adders. The proposed architecture has been designed and verified by VerilogHDL and synthesized by Synopsys Design Compiler with a Hynix 0.35$\mu$m STD cell library. The maximum operating frequency is 200MHz and the throughput is 175Mbps with 16 clock latencies.

Characteristics of Static Shift in 3-D MT Inversion (3차원 MT 역산에서 정적효과의 특성 고찰)

  • Lee Tae Jong;Uchida Toshihiro;Sasaki Yutaka;Song Yoonho
    • Geophysics and Geophysical Exploration
    • /
    • v.6 no.4
    • /
    • pp.199-206
    • /
    • 2003
  • Characteristics of the static shift are discussed by comparing the three-dimensional MT inversion with/without static shift parameterization. The galvanic distortion by small-scale shallow feature often leads severe distortion in inverted resistivity structures. The new inversion algorithm is applied to four numerical data sets contaminated by different amount of static shift. In real field data interpretations, we generally do not have any a-priori information about how much the data contains the static shift. In this study, we developed an algorithm for finding both Lagrangian multiplier for smoothness and the trade-off parameter for static shift, simultaneously in 3-D MT inversion. Applications of this inversion routine for the numerical data sets showed quite reasonable estimation of static shift parameters without any a-priori information. The inversion scheme is successfully applied to all the four data sets, even when the static shift does not obey the Gaussian distribution. Allowing the static shift parameters have non-zero degree of freedom to the inversion, we could get more accurate block resistivities as well as static shifts in the data. When inversion does not consider the static shift as inversion parameters (conventional MT inversion), the block resistivities on the surface are modified considerably to match possible static shift. The inhomogeneous blocks on the surface can generate the static shift at low frequencies. By those mechanisms, the conventional 3-D MT inversion can reconstruct the resistivity structures to some extent in the deeper parts even when moderate static shifts are in the data. As frequency increased, however, the galvanic distortion is not frequency independent any more, and thus the conventional inversion failed to fit the apparent resistivity and phase, especially when strong static shift is added. Even in such case, however, reasonable estimation of block resistivity as well as static shift parameters were obtained by 3-D MT inversion with static shift parameterization.

An Optimized Hardware Design for High Performance Residual Data Decoder (고성능 잔여 데이터 복호기를 위한 최적화된 하드웨어 설계)

  • Jung, Hong-Kyun;Ryoo, Kwang-Ki
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.13 no.11
    • /
    • pp.5389-5396
    • /
    • 2012
  • In this paper, an optimized residual data decoder architecture is proposed to improve the performance in H.264/AVC. The proposed architecture is an integrated architecture that combined parallel inverse transform architecture and parallel inverse quantization architecture with common operation units applied new inverse quantization equations. The equations without division operation can reduce execution time and quantity of operation for inverse quantization process. The common operation unit uses multiplier and left shifter for the equations. The inverse quantization architecture with four common operation units can reduce execution cycle of inverse quantization to one cycle. The inverse transform architecture consists of eight inverse transform operation units. Therefore, the architecture can reduce the execution cycle of inverse transform to one cycle. Because inverse quantization operation and inverse transform operation are concurrency, the execution cycle of inverse transform and inverse quantization operation for one $4{\times}4$ block is one cycle. The proposed architecture is synthesized using Magnachip 0.18um CMOS technology. The gate count and the critical path delay of the architecture are 21.9k and 5.5ns, respectively. The throughput of the architecture can achieve 2.89Gpixels/sec at the maximum clock frequency of 181MHz. As the result of measuring the performance of the proposed architecture using the extracted data from JM 9.4, the execution cycle of the proposed architecture is about 88.5% less than that of the existing designs.

A UHF-band Passive Temperature Sensor Tag Chip Fabricated in $0.18-{\mu}m$ CMOS Process ($0.18-{\mu}m$ CMOS 공정으로 제작된 UHF 대역 수동형 온도 센서 태그 칩)

  • Pham, Duy-Dong;Hwang, Sang-Kyun;Chung, Jin-Yong;Lee, Jong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.45 no.10
    • /
    • pp.45-52
    • /
    • 2008
  • We investigated the design of an RF-powered, wireless temperature sensor tag chip using $0.18-{\mu}m$ CMOS technology. The transponder generates its own power supply from small incident RF signal using Schottky diodes in voltage multiplier. Ambient temperature is measured using a new low-power temperature-to-voltage converter, and an 8-bit single-slope ADC converts the measured voltage to digital data. ASK demodulator and digital control are combined to identify unique transponder (ID) sent by base station for multi-transponder applications. The measurement of the temperature sensor tag chip showed a resolution of $0.64^{\circ}C/LSB$ in the range from $20^{\circ}C$ to $100^{\circ}C$, which is suitable for environmental temperature monitoring. The chip size is $1.1{\times}0.34mm^2$, and operates at clock frequency of 100 kHz while consuming $64{\mu}W$ power. The temperature sensor required a -11 dBm RF input power, supported a conversion rate of 12.5 k-samples/sec, and a maximum error of $0.5^{\circ}C$.

An Application of loop-loop EM Method for Geotechnical Survey (지반조사를 위한 loop-loop 전자탐사 기법의 적용)

  • You Jin-Sang;Song Yoonho;Seo1 Soon-Jee;Song Young-Soo
    • Geophysics and Geophysical Exploration
    • /
    • v.4 no.2
    • /
    • pp.25-33
    • /
    • 2001
  • Loop-loop electromagnetic (EM) survey in frequency domain has been carried out in order to provide basic solution to geotechnical applications. Source and receiver configuration may be horizontal co-planar (HCP) and/or vertical co-planar (VCP). Three quadrature components of mutual impedance ratio for each configuration are used to construct the subsurface image. For the purpose of obtaining the model response and validating the reasonable performance of the inversion, we obtained each responses of two-layered and three-layered earth models and two-dimensional (2-D) isolated anomalous body. The response of 2-D isolated anomalous body has been calculated using extended Born approximation for the solution of 2.5-D integral equation describing EM scattering problem. As a result of the least-squares inversion with variable Lagrangian multiplier, we could construct more resolvable image from HCP data than VCP data. Furthermore, joint inversion of HCP and VCP data made better stability and resolution of the inversion. Resistivity values, however, did not exactly match the true ones. Loop-loop EM field data was obtained with EM34-3XL system manufactured by Geonics Ltd. (Canada). Electrical resistivity survey was conducted on the same line for the comparison in advance. Since the constructed image from loop-loop EM data by 2-D inversion algorithm showed almost similar resistivity distribution to that from electrical resistivity one, we expect the developed 2.5-D loop-loop EM inversion program can be applied for the reconnaissance site survey.

  • PDF

Design of Format Conversion Filters for MPEG-4 (MPEG-4를 위한 포맷 변환 필터의 설계)

  • Jo, Nam Ik;Kim, Gi Cheol;Yu, Ha Yeong
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.22 no.4
    • /
    • pp.637-637
    • /
    • 1997
  • In this paper, format conversion filters are proposed, which have advantages in hardware implementation compared to the ones proposed in MPEG-4 Video Verification Model. since each coefficients of the proposed filters is constrained to have less than two non-zero digits in minimal signed digit representation, multiplication of input and the coefficient can be implemented by a single adder. As a result, the proposed filters have advantages in hardware complexity and speed, compared to the filters which are usually implemented by integer multiplier or carry save adders. Six kinds of filters are proposed in MPEG-4 Video Verification Model for size conversion of 2:1, 4:1, 5:3 and 5:6. We design 5 filters for the same purpose and compare the performance. The remaining one is very simple to implement. For comparing the filtering performance, we first compare the results of sine wave frequency conversion as an indirect but meaningful comparison. Second. We compute the PSNR of the images obtained from the proposed filters and the ones proposed by MPEG, with reference to the images obtained by using double precision arithmetic and high order filter. The results show that the performance of the proposed filters is almost the same as that of the filters proposed by MPEG. In conclusion, the peroformance of the proposed filters is comparable to that of the ones in MPEG-4, while requiring lower hardware complexity and providing high operating speed.

A Security SoC embedded with ECDSA Hardware Accelerator (ECDSA 하드웨어 가속기가 내장된 보안 SoC)

  • Jeong, Young-Su;Kim, Min-Ju;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.26 no.7
    • /
    • pp.1071-1077
    • /
    • 2022
  • A security SoC that can be used to implement elliptic curve cryptography (ECC) based public-key infrastructures was designed. The security SoC has an architecture in which a hardware accelerator for the elliptic curve digital signature algorithm (ECDSA) is interfaced with the Cortex-A53 CPU using the AXI4-Lite bus. The ECDSA hardware accelerator, which consists of a high-performance ECC processor, a SHA3 hash core, a true random number generator (TRNG), a modular multiplier, BRAM, and control FSM, was designed to perform the high-performance computation of ECDSA signature generation and signature verification with minimal CPU control. The security SoC was implemented in the Zynq UltraScale+ MPSoC device to perform hardware-software co-verification, and it was evaluated that the ECDSA signature generation or signature verification can be achieved about 1,000 times per second at a clock frequency of 150 MHz. The ECDSA hardware accelerator was implemented using hardware resources of 74,630 LUTs, 23,356 flip-flops, 32kb BRAM, and 36 DSP blocks.

Low Power ADC Design for Mixed Signal Convolutional Neural Network Accelerator (혼성신호 컨볼루션 뉴럴 네트워크 가속기를 위한 저전력 ADC설계)

  • Lee, Jung Yeon;Asghar, Malik Summair;Arslan, Saad;Kim, HyungWon
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.25 no.11
    • /
    • pp.1627-1634
    • /
    • 2021
  • This paper introduces a low-power compact ADC circuit for analog Convolutional filter for low-power neural network accelerator SOC. While convolutional neural network accelerators can speed up the learning and inference process, they have drawback of consuming excessive power and occupying large chip area due to large number of multiply-and-accumulate operators when implemented in complex digital circuits. To overcome these drawbacks, we implemented an analog convolutional filter that consists of an analog multiply-and-accumulate arithmetic circuit along with an ADC. This paper is focused on the design optimization of a low-power 8bit SAR ADC for the analog convolutional filter accelerator We demonstrate how to minimize the capacitor-array DAC, an important component of SAR ADC, which is three times smaller than the conventional circuit. The proposed ADC has been fabricated in CMOS 65nm process. It achieves an overall size of 1355.7㎛2, power consumption of 2.6㎼ at a frequency of 100MHz, SNDR of 44.19 dB, and ENOB of 7.04bit.

Development of Three-dimensional Inversion Algorithm of Complex Resistivity Method (복소 전기비저항 3차원 역산 알고리듬 개발)

  • Son, Jeong-Sul;Shin, Seungwook;Park, Sam-Gyu
    • Geophysics and Geophysical Exploration
    • /
    • v.24 no.4
    • /
    • pp.180-193
    • /
    • 2021
  • The complex resistivity method is an exploration technique that can obtain various characteristic information of underground media by measuring resistivity and phase in the frequency domain, and its utilization has recently increased. In this paper, a three-dimensional inversion algorithm for the CR data was developed to increase the utilization of this method. The Poisson equation, which can be applied when the electromagnetic coupling effect is ignored, was applied to the modeling, and the inversion algorithm was developed by modifying the existing algorithm by adopting comlex variables. In order to increase the stability of the inversion, a technique was introduced to automatically adjust the Lagrangian multiplier according to the ratio of the error vector and the model update vector. Furthermore, to compensate for the loss of data due to noisy phase data, a two-step inversion method that conducts inversion iterations using only resistivity data in the beginning and both of resistivity and phase data in the second half was developed. As a result of the experiment for the synthetic data, stable inversion results were obtained, and the validity to real data was also confirmed by applying the developed 3D inversion algorithm to the analysis of field data acquired near a hydrothermal mine.