• Journal of the Korean Institute of Telematics and Electronics
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• v.16 no.6
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• pp.31-39
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• 1979

This paper dealt with a general the Qrem of frequency doubler. By summarizing the frequency doubler theorems, a new frequency doubter theorem can be derived. "In time invarient system, if the input waveform shows the half-wave symmetric characteristic and if the even function is the mapping from input into output, then the frequency of output is at least 2-times of input frequency." By the theorem, this paper propose a new wide band square wave frequency doublerusing negative resistance circuit.e circuit.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.109-117
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• 2004

In this paper, a K-band local oscillator composed of a VCDRO(Voltage Controlled Dielectric Resonator Oscillator), GaAs MESFET, and Reflector type frequency doubler has been designed and fabricated. TO obtain a good phase noise performance of a VCDRO, a active device was selected with a low noise figure and a low flicker noise MESFET and a dielectric resonator was used for selecting stable and high oscillation frequency. Especially, to have a higher conversion gain than a conventional doubler as well as a good harmonic suppression performance with circuit size reduced a doubler structure was employed as the Reflector type composed of a reflector and a open stub of quarter wave length for rejecting the unwanted harmonics. The measured results of fabricated oscillator show that the output power was 5.8 dBm at center frequency 12.05 GHz and harmonic suppression -37.98 dBc, Phase noise -114 dBc at 100 KHz offset frequency, respectively, and measured results show of fabricated frequency doubler, the output power at 5.8 dBm of input power is 1.755 dBm conversion gain 1.482 dB, harmonic suppression -33.09 dBc, phase noise -98.23 dBc at 100 KHz offset frequency, respectively. This oscillator could be available to a local oscillator in K-band which used frequency doubler techniques.

• 한국ITS학회:학술대회논문집
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• v.2007 no.10
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• pp.141-143
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• 2007

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.294-297
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• 2003

This paper describes the design and the simulation of a frequency doubler for millimeter-wave applications using distributed amplifier technology. The designed frequency multiplier has 10% bandwidth at 58GHz output. This paper investigates nonlinear analysis of pHEMT frequency multipliers utilizing AM-AM and AM-PM distortion characteristics of frequency doubler. The conversion loss is 2.1dB and harmonic suppression is larger than 18.6dBc with 5dBm input power

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.7
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• pp.713-718
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• 2008

A modified broad-band ring hybrid balun with additional two shorted $\lambda$/4 stubs is proposed. The proposed balun is a modified version which has additional two shorted $\lambda$/4 stubs to compensate phase and amplitude imbalances of conventional ring hybrid coupler. To demonstrate the validity of the proposed balun, a balanced Schottky-diode frequency doubler is designed and measured. Measurement data show that the proposed frequency doubler has around 10 dB conversion loss and more than 30 dB fundamental suppression over an input range of $1.6{\sim}2.35\;GHz$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.8
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• pp.714-720
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• 2009

In this paper, design and the implementation method of a band-tunable ultra-wideband planar doubler are described Microstrip-to-CPS(balun) transition and Microstrip-to-CPW transition are respectively used for input/output matching circuits for the doubler. The Input balun structure allows to apply diode bias, and the doubler output frequency is tunable by changing the diode bias voltage. With the bias voltage of -0.6 V, the measured operating frequency band of the implemented doubler is $10{\sim}20$ GHz, with the bias voltage of $-0.2{\sim}-0.4$ V, the operating frequency band is $10{\sim}30$ GHz, and with 0 V bias, the operating frequency band is $20{\sim}30$ GHz. The doubler provides conversion loss of less than 15 dB and fundamental frequency suppression of 30 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.5
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• pp.513-520
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• 2003

In this paper, a novel design concept of frequency doubler using feedforward technique and DGS microstrip line is proposed. The feedforward loop plays a role of fundamental frequency suppression and DGS microstrip line suppresses over the 3rd order harmonic components. By using this new concept, the high suppression for the undesired signals could be achieved easily. The proposed technique is experimentally demonstrated in 1.87 GHz-to-3.74 GHz frequency doubler. The output power of -3 dBm at the frequency of 3.74 GHz(2f$\_$0/) is measured with 42.9 dB suppression of the fundamental frequency signal(f$\_$0/), 20.2 dB suppression of the 3rd harmonic signal(3f$\_$0/) and B9.7 dB suppression of the 4th harmonic signal(4f$\_$0/). The conversion loss of -2.34 dB ∼ -5.8 dB at the bandwidth of 100 MHz, the phase noise of -97.51 dB/Hz(＠10 kHz) were measured.

• Journal of electromagnetic engineering and science
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• v.15 no.4
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• pp.232-238
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• 2015

This work describes the development of a D-band (110-170 GHz) signal source based on a SiGe BiCMOS technology. This D-band signal source consists of a V-band (50-75 GHz) oscillator, a V-band amplifier, and a D-band frequency doubler. The V-band signal from the oscillator is amplified for power boost, and then the frequency is doubled for D-band signal generation. The V-band oscillator showed an output power of 2.7 dBm at 67.3 GHz. Including a buffer stage, it had a DC power consumption of 145 mW. The peak gain of the V-band amplifier was 10.9 dB, which was achieved at 64.0 GHz and consumed 110 mW of DC power. The active frequency doubler consumed 60 mW for D-band signal generation. The integrated D-band source exhibited a measured output oscillation frequency of 133.2 GHz with an output power of 3.1 dBm and a phase noise of -107.2 dBc/Hz at 10 MHz offset. The chip size is $900{\times}1,890{\mu}m^2$, including RF and DC pads.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.6
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• pp.560-566
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• 2004

In this paper, active frequency doubler with broadband characteristics from 6 ㎓ to 12 ㎓ was designed and fabricated using PHEMT. The designed frequency multiplier has a bias point near pinch-off and a proposed series RC circuit between bias line and input matching network far the improvement of stability. With 0 ㏈m input power, second harmonic of 1.7 ㏈m at 12 ㎓ -27.5 ㏈c suppression of 6 ㎓ fundamental, -18 ㏈c suppression of 18 ㎓ 3rd harmonic, and the 3 ㏈ output bandwidth of 1,8 ㎓ have been measured.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.307-307
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• 2004