• 제목/요약/키워드: Frame per second(FPS)

검색결과 38건 처리시간 0.023초

상관 영역과 초당 촬영 수와 해상도에 따른 Granular PIV에서의 유동 속도의 오차 분석 (Error Analysis of Flow Velocity Measured through Granular PIV Based on Interrogation Area, Frame Per Second, and Video Resolution)

  • 최종은;박준영
    • 한국기계가공학회지
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    • 제20권7호
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    • pp.58-65
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    • 2021
  • Research on general particle image velocimetry (PIV) has been conducted extensively, but studies on granular PIV are relatively insufficient. In addition, the parameters used for analyzing granular PIV need to be optimized. In this study, we analyzed the error of velocity measurements based on the interrogation area (64-192 pixel), frame per second (30-120 FPS), and video resolution [ultrahigh definition (UHD) and high definition (HD)] within the velocity range typically measured in hoppers. The estimated errors of the granular PIV were below 5%, which is generally acceptable. However, considering the data reliability, the flow velocity in the hopper could be measured with less than 5% error at 120 FPS or higher in the HD resolution and 30 FPS or higher in the UHD resolution.

실내 3D 게임 장면의 잠재적 가시 집합을 위한 효과적인 하드웨어 압축 구조 (An Effective Structure of Hardware Compression for Potentially Visible Set of Indoor 3D Game Scenes)

  • 김영식
    • 한국게임학회 논문지
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    • 제14권6호
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    • pp.29-38
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    • 2014
  • 대규모 실내 3D 게임 장면에서 차폐 컬링 정보를 미리 계산하는 잠재적 가시 집합(potentially visible set: PVS)은 데이터를 처리하고 저장해야하는 양이 상당히 크지만 많은 부분이 0으로 표현된다. 본 논문에서는 모바일 환경의 3D 게임 장면 트리 구성 중에 PVS 데이터를 ZRLE (zero run length encoding) 방식으로 압축하는 효과적인 하드웨어 압축 구조를 설계한다. 3D 게임 시뮬레이션을 통하여 제안하는 구조의 PVS 데이터 압축 비율, PVS 컬링과 절두체 컬링에 따른 렌더링 속도 (frame per second: FPS)를 분석하였다.

GPU-Accelerated Single Image Depth Estimation with Color-Filtered Aperture

  • Hsu, Yueh-Teng;Chen, Chun-Chieh;Tseng, Shu-Ming
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제8권3호
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    • pp.1058-1070
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    • 2014
  • There are two major ways to implement depth estimation, multiple image depth estimation and single image depth estimation, respectively. The former has a high hardware cost because it uses multiple cameras but it has a simple software algorithm. Conversely, the latter has a low hardware cost but the software algorithm is complex. One of the recent trends in this field is to make a system compact, or even portable, and to simplify the optical elements to be attached to the conventional camera. In this paper, we present an implementation of depth estimation with a single image using a graphics processing unit (GPU) in a desktop PC, and achieve real-time application via our evolutional algorithm and parallel processing technique, employing a compute shader. The methods greatly accelerate the compute-intensive implementation of depth estimation with a single view image from 0.003 frames per second (fps) (implemented in MATLAB) to 53 fps, which is almost twice the real-time standard of 30 fps. In the previous literature, to the best of our knowledge, no paper discusses the optimization of depth estimation using a single image, and the frame rate of our final result is better than that of previous studies using multiple images, whose frame rate is about 20fps.

다양한 하중 조건에서 DP980 판재의 불안정성 및 파단점 결정시 DIC Frame Rate의 영향 (Influence of DIC Frame Rate on Experimental Determination of Instability and Fracture Points for DP980 Sheets under Various Loading Conditions)

  • 노은솔;홍석무
    • 소성∙가공
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    • 제28권6호
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    • pp.368-374
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    • 2019
  • The past recent years have seen an increasing use of high-strength steel sheets in the automotive industry. However, the formability and damage prediction of these materials requires accurate acquisition of necking and fracture strains. Digital image correlation (DIC) is used to accurately capture the necking and fracture strains during testing. The fact that single time points of capturing vary with frame rate makes the need for an investigation necessary. For the high-strength steel DP980, the frame-rate dependences of the final necking and fracture strains values are analyzed here. To eliminate the influence of gauge length, the strains were measured locally by DIC. Results for three specimen shapes obtained with frame rates of 1 and 900 fps (frames per second) were considered and based on them, triaxiality failure diagrams (TFD) are established. It was observed that after diffuse necking, the deformation path departed from the initially linear one, and the stress triaxiality grew with ongoing deformation. It was further revealed that the frame rate-dependence of the necking strain was rather low (< 2%), whereas the fracture strain could be underestimated by up to 8% when the lower frame rate of 1 fps was used (compared with 900 fps). In this study, this issue is investigated while taking into consideration the three different triaxialities. These results demonstrate the importance of choosing an appropriate frame rate for the determination of necking and fracture strains in particular.

Detecting Digital Micromirror Device Malfunctions in High-throughput Maskless Lithography

  • Kang, Minwook;Kang, Dong Won;Hahn, Jae W.
    • Journal of the Optical Society of Korea
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    • 제17권6호
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    • pp.513-517
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    • 2013
  • Recently, maskless lithography (ML) systems have become popular in digital manufacturing technologies. To achieve high-throughput manufacturing processes, digital micromirror devices (DMD) in ML systems must be driven to their operational limits, often in harsh conditions. We propose an instrument and algorithm to detect DMD malfunctions to ensure perfect mask image transfer to the photoresist in ML systems. DMD malfunctions are caused by either bad DMD pixels or data transfer errors. We detect bad DMD pixels with $20{\times}20$ pixel by white and black image tests. To analyze data transfer errors at high frame rates, we monitor changes in the frame rate of a target DMD pixel driven by the input data with a set frame rate of up to 28000 frames per second (fps). For our data transfer error detection method, we verified that there are no data transfer errors in the test by confirming the agreement between the input frame rate and the output frame rate within the measurement accuracy of 1 fps.

항공시뮬레이터에서 예측 기반의 동적 LOD 적용방안 (Prediction Based Dynamic Level of Detail in Flight Simulator)

  • 김동진;임주호;김기일
    • 한국정보통신학회논문지
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    • 제20권7호
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    • pp.1363-1368
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    • 2016
  • 비행 시뮬레이터에서는 조종사에게 실제와 흡사한 가상현실을 제공하기 위해서는 원활하면서 현실감 있는 이미지 처리를 위한 일정한 렌더링 속도가 요구된다. 하지만 고해상도 지형 데이터를 사용하는 경우, 개체의 증가로 인해 렌더링 속도가 감소하거나 속도의 변동이 큰 경우가 발생하는 경우가 발생하므로 기존의 연구들은 이를 해결하기 위하여 Level of Detail (LOD)를 적용한다. 하지만, LOD기법의 경우 정점 수가 늘어난 것을 감지한 이후 레벨의 변경을 적용하므로 화면의 변화가 감지되는 문제점이 발생한다. 이를 해결하기 위하여 본 논문에서는 예측 알고리즘을 통해 다음 시점에서 늘어날 렌더링 데이터에 대한 과부하를 예측하고 미리 LOD의 레벨을 조절하는 방법을 제안한다. 또한, 제안된 방법을 검증하기 위해서 예측 데이터와 실제 데이터와 비교하였고 그 결과 LOD 레벨을 조절하였을 때 정점수가 줄어들고 FPS 수치가 변화하는 모습을 보여주었다.

Gate/Body-Tied 구조의 고감도 광검출기를 이용한 2500 fps 고속 바이너리 CMOS 이미지센서 (2500 fps High-Speed Binary CMOS Image Sensor Using Gate/Body-Tied Type High-Sensitivity Photodetector)

  • 김상환;권현우;장준영;김영모;신장규
    • 센서학회지
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    • 제30권1호
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    • pp.61-65
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    • 2021
  • In this study, we propose a 2500 frame per second (fps) high-speed binary complementary metal oxide semiconductor (CMOS) image sensor using a gate/body-tied (GBT) p-channel metal oxide semiconductor field effect transistor-type high-speed photodetector. The GBT photodetector generates a photocurrent that is several hundred times larger than that of a conventional N+/P-substrate photodetector. By implementing an additional binary operation for the GBT photodetector with such high-sensitivity characteristics, a high-speed operation of approximately 2500 fps was confirmed through the output image. The circuit for binary operation was designed with a comparator and 1-bit memory. Therefore, the proposed binary CMOS image sensor does not require an additional analog-to-digital converter (ADC). The proposed 2500 fps high-speed operation binary CMOS image sensor was fabricated and measured using standard CMOS process.

데이터패스를 이용한 SA-DCT 구현 (Implementation of SA-DCT using a datapath)

  • 박주현;김영민
    • 전자공학회논문지C
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    • 제35C권5호
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    • pp.25-32
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    • 1998
  • In this paper, SA (shape adaptive)-DCT is implemented using a datapath with 4 MACs (multiplication & accumulator). DCT is a well-known bottleneck of real-time video compression using MPEG-like schemes. High-speed pipelined MACs presented here implement real-time DCT. A datapath in this paper executes DCT/IDCT algorithms for QCIF 15fps(frame per second), maximum rate of VLBV(very low bitrte video) in MPEG-4. A 32bit accumulator in a MAC prevents distortion caused by fixed-point process. It can be applied to various operations such as ME (motion estimation) and MC(motion compensation) with a absolutor and a halfer.

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수화 애니메이션을 위한 중간 프레임 생성 방법 (A Method for Generating Inbetween Frames in Sign Language Animation)

  • 오정근;김상철
    • 한국정보처리학회논문지
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    • 제7권5호
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    • pp.1317-1329
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    • 2000
  • The advanced techniques for video processing and computer graphics enables a sign language education system to appear. the system is capable of showing a sign language motion for an arbitrary sentence using the captured video clips of sign language words. In this paper, a method is suggested which generates the frames between the last frame of a word and the first frame of its following word in order to animate hand motion. In our method, we find hand locations and angles which are required for in between frame generation, capture and store the hand images at those locations and angles. The inbetween frames generation is simply a task of finding a sequence of hand angles and locations. Our method is computationally simple and requires a relatively small amount of disk space. However, our experiments show that inbetween frames for the presentation at about 15fps (frame per second) are achieved so tat the smooth animation of hand motion is possible. Our method improves on previous works in which computation cost is relativey high or unnecessary images are generated.

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VHDL을 이용한 프로그램 가능한 스택 기반 영상 프로세서 구조 설계 (Design of Architecture of Programmable Stack-based Video Processor with VHDL)

  • 박주현;김영민
    • 전자공학회논문지C
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    • 제36C권4호
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    • pp.31-43
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    • 1999
  • 본 논문의 주요 목표는 고성능 SVP(Stack-based Video Processor)를 설계하는 것이다. SVP는 과거에 제안된 스택 머신과 영상 프로세서의 최적의 측면만을 선택함으로써 더 좋은 구조를 갖도록 하는 포괄적인 구조이다. 본 구조는 객체 지향형 프로그램의 소규모의 많은 서브루틴을 가지고 있기 때문에 스택 버퍼를 갖는 준범용 S-RISC(Stack-based Reduced Instruction Set Comuter)를 이용하여 객체 지향형 영상 데이터를 처리한다. 그리고 MPEG-4의 반화소 단위 처리와 고급 모드 움직임 보상, 움직임 예측, SA-DCT(Shape Adaptive-Discrete Cosine Transform)가 가능하며, 절대값기, 반감기를 가지고 있어서 부호화하기로 확장할 수 있도록 하였다. SVP는 0.6㎛ 3-메탈 계층 CMOS 표준 셀 기준을 이용하여 설계되었으며, 110K 로직 게이트와 12Kbit SRAM 내부 버퍼로 이루어지고 50 MHz의 동작 속도를 가진다 . MPEG-4의 VLBL(Very Low Bitrate Video) 최대 전송율인 QCIF 15fps(frame per second)로 영상 재생 알고리즘을 수행한다.

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