• Title/Summary/Keyword: Flexible interconnects

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Bending Fatigue Reliability Improvements of Cu Interconnects on Flexible Substrates through Mo-Ti Alloy Adhesion Layer (Mo-Ti 합금 접착층을 통한 유연 기판 위 구리 배선의 기계적 신뢰성 향상 연구)

  • Lee, Young-Joo;Shin, Hae-A-Seul;Nam, Dae-Hyun;Yeon, Han-Wool;Nam, Boae;Woo, Kyoohee;Joo, Young-Chang
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.1
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    • pp.21-25
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    • 2015
  • Bending fatigue characteristics of Cu films and $8{\mu}m$ width Cu interconnects on flexible substrates were investigated, and fatigue reliability improvement was achieved through Mo-Ti alloy adhesion layer. Tensile bending fatigue reliability of Cu interconnects is 3 times lower than that of Cu films, and even compressive bending fatigue reliability of Cu interconnects is 6 times lower than that of Cu films. From these results, mechanical crack formation could be fatal in Cu interconnects. With Mo-Ti adhesion layer, fatigue reliability of Cu films and interconnects were enhanced due to the increase of adhesion strength and the suppression of slip induced crack initiation.

Hybrid-type stretchable interconnects with double-layered liquid metal-on-polyimide serpentine structure

  • Yim, Doo Ri;Park, Chan Woo
    • ETRI Journal
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    • v.44 no.1
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    • pp.147-154
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    • 2022
  • We demonstrate a new double-layer structure for stretchable interconnects, where the top surface of a serpentine polyimide support is coated with a thin eutectic gallium-indium liquid metal layer. Because the liquid metal layer is constantly fixed on the solid serpentine body in this liquid-on-solid structure, the overall stretching is accomplished by widening the solid frame itself, with little variation in the total length and cross-sectional area of the current path. Therefore, we can achieve both invariant resistance and infinite fatigue life by combining the stretchable configuration of the underlying body with the freely deformable nature of the top liquid conductor. Further, we fabricated various types of double-layer interconnects as narrow as 10 ㎛ using the roll-painting and lift-off patterning technique based on conventional photolithography and quantitatively validated their beneficial properties. The new interconnecting structure is expected to be widely used in applications requiring high-performance and high-density stretchable circuits owing to its superior reliability and capability to be monolithically integrated with thin-film devices.

Analysis and Design Optimization of Interconnects for High-Speed LVDS Applications (고속 LVDS 응용을 위한 전송 접속 경로의 분석 및 설계 최적화)

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.10a
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    • pp.761-764
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    • 2007
  • This paper addresses the analysis and the design optimization of differential interconnects for Low-Voltage Differential Signaling (LVDS) applications. Thanks to the differential transmission and the low voltage swing, LVDS offers high data rates and improved noise immunity with significantly reduced power consumption in data communications, high-resolution display, and flat panel display. We present an improved model and new equations to reduce impedance mismatch and signal degradation in cascaded interconnects using optimization of interconnect design parameters such as trace width, trace height and πace space in differential flexible printed circuit board (FPCB) transmission lines. We have carried out frequency-domain full-wave electromagnetic simulations, time-domain transient simulations, and S-parameter simulations to evaluate the high-frequency characteristics of the differential FPCB interconnects.

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Analysis and Design Optimization of Interconnects for High-Speed LVDS Applications (고속 LVDS 응용을 위한 전송선 분석 및 설계 최적화)

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.10
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    • pp.70-78
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    • 2009
  • This paper addresses the analysis and the design optimization of differential interconnects for high-speed Low-Voltage Differential Signaling (LVDS) applications. Thanks to the differential transmission and the low voltage swing, LVDS offers high data rates and improved noise immunity with significantly reduced power consumption in data communications, high-resolution display, and flat panel display. We present an improved model and new equations to reduce impedance mismatch and signal degradation in cascaded interconnects using optimization of interconnect design parameters such as trace width, trace height and trace space in differential printed circuit board (FPCB) transmission lines. We have carried out frequency-domain full-wave electromagnetic simulations, and time-domain transient simulations to evaluate the high-frequency characteristics of the differential FPCB interconnects. We believe that the proposed approach is very helpful to optimize high-speed differential FPCB interconnects for LVDS applications.

Design Optimization of Differential FPCB Transmission Line for Flat Panel Display Applications (평판디스플레이 응용을 위한 차동 FPCB 전송선 설계 최적화)

  • Ryu, Jee-Youl;Noh, Seok-Ho;Lee, Hyung-Joo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.5
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    • pp.879-886
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    • 2008
  • This paper addresses the analysis and the design optimization of differential interconnects for Low-Voltage Differential Signaling (LVDS) applications. Thanks to the differential transmission and the low voltage swing, LVDS offers high data rates and improved noise immunity with significantly reduced power consumption in data communications, high-resolution display, and flat panel display. We present an improved model and new equations to reduce impedance mismatch and signal degradation in cascaded interconnects using optimization of interconnect design parameters such as trace width, trace height and trace space in differential flexible printed circuit board (FPCB) transmission lines. We have carried out frequency-domain full-wave electromagnetic simulations, time-domain transient simulations, and S-parameter simulations to evaluate the high-frequency characteristics of the differential FPCB interconnects. The 10% change in trace width produced change of approximately 6% and 5.6% in differential impedance for trace thickness of $17.5{\mu}m$ and $35{\mu}m$, respectively. The change in the trace space showed a little change. We believe that the proposed approach is very helpful to optimize high-speed differential FPCB interconnects for LVDS applications.

Nanoplasmonics: An Enabling Platform for Integrated Photonics and Biosensing

  • Lee, Jihye;Yeo, Jong-Souk
    • Applied Science and Convergence Technology
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    • v.25 no.1
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    • pp.7-14
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    • 2016
  • Nanoplasmonics is a developing field that offers attractive optical, electrical, and thermal properties for a wide range of potential applications. Based on the compelling characteristics of this field, researchers have shed light on the possibilities of integrated photonics and biosensing platforms using nanoplasmonic principles. Single and unique nanostructures with plasmons can act as individual transducers that convert desired information into measurable and readable signals. In this review, we will discuss nanoplasmonic sensors, especially those in relation to photodetectors for future optical interconnects, and bioinformation sensing platforms based on nanoplasmonics, thus providing a viable approach by which to create sensors corresponding to target applications. In addition, we also discuss scalable fabrication processes for the creation of unconventional nanoplasmonic devices, which will enable next-generation plasmonic devices for wearable, flexible, and biocompatible systems.

Liner Analysis of IMV Proportional Flow Control Valve Static Characteristics (IMV 비례 유량제어밸브 정특성 선형해석)

  • Jung, Gyuhong
    • Journal of Drive and Control
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    • v.16 no.4
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    • pp.56-64
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    • 2019
  • Recently, as the environmental regulation for earth moving equipment has been tightened, advanced systems using electronic control have been introduced for energy savings. An IMV(Independent Metering Valve), which consists of four 2-way valves, is one of the electro-hydraulic control systems that provides more flexible controllability and potential for energy savings in excavators, when compared to the conventional 4-way spool valve system. To fully realize an IMV, a two-stage bi-directional flow control valve which can regulate the large amount of flow in both directions, should be developed in advance. A simple design that allows proportional flow control to apply the pilot pressure from the current-controlled solenoid to the spring loaded flow control spool and thus valve displacement, is proportional to the solenoid current. However, this open-loop type valve is vulnerable to flow force which directly affects the valve displacement. Force feedback servo of which the position loop is closed by the feedback spring which interconnects the solenoid valve and flow control spool, could compensate for the flow force. In this study, linearity for the solenoid current input and robustness against load pressure disturbance is investigated by linear analysis of the static nonlinear equations for the IMV proportional flow control valve with feedback spring. Gains of the linear system confirm the performance improvement with the feedback spring design.

Technology Trends in CXL Memory and Utilization Software (CXL 메모리 및 활용 소프트웨어 기술 동향 )

  • H.Y. Ahn;S.Y. Kim;Y.M. Park;W.J. Han
    • Electronics and Telecommunications Trends
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    • v.39 no.1
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    • pp.62-73
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    • 2024
  • Artificial intelligence relies on data-driven analysis, and the data processing performance strongly depends on factors such as memory capacity, bandwidth, and latency. Fast and large-capacity memory can be achieved by composing numerous high-performance memory units connected via high-performance interconnects, such as Compute Express Link (CXL). CXL is designed to enable efficient communication between central processing units, memory, accelerators, storage, and other computing resources. By adopting CXL, a composable computing architecture can be implemented, enabling flexible server resource configuration using a pool of computing resources. Thus, manufacturers are actively developing hardware and software solutions to support CXL. We present a survey of the latest software for CXL memory utilization and the most recent CXL memory emulation software. The former supports efficient use of CXL memory, and the latter offers a development environment that allows developers to optimize their software for the hardware architecture before commercial release of CXL memory devices. Furthermore, we review key technologies for improving the performance of both the CXL memory pool and CXL-based composable computing architecture along with various use cases.

Ultimate Heterogeneous Integration Technology for Super-Chip (슈퍼 칩 구현을 위한 헤테로집적화 기술)

  • Lee, Kang-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.4
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    • pp.1-9
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    • 2010
  • Three-dimensional (3-D) integration is an emerging technology, which vertically stacks and interconnects multiple materials, technologies, and functional components such as processor, memory, sensors, logic, analog, and power ICs into one stacked chip to form highly integrated micro-nano systems. Since CMOS device scaling has stalled, 3D integration technology allows extending Moore's law to ever high density, higher functionality, higher performance, and more diversed materials and devices to be integrated with lower cost. The potential benefits of 3D integration can vary depending on approach; increased multifunctionality, increased performance, increased data bandwidth, reduced power, small form factor, reduced packaging volume, increased yield and reliability, flexible heterogeneous integration, and reduced overall costs. It is expected that the semiconductor industry's paradiam will be shift to a new industry-fusing technology era that will offer tremendous global opportunities for expanded use of 3D based technologies in highly integrated systems. Anticipated applications start with memory, handheld devices, and high-performance computers and extend to high-density multifunctional heterogeneous integration of IT-NT-BT systems. This paper attempts to introduce new 3D integration technologies of the chip self-assembling stacking and 3D heterogeneous opto-electronics integration for realizng the super-chip.