• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.75-85
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• 2009

This work proposes a 13b 100MS/s 0.13um CMOS ADC for 3G communication systems such as two-carrier W-CDMA applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs a four-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. Area-efficient high-speed high-resolution gate-bootstrapping circuits are implemented at the sampling switches of the input SHA to maintain signal linearity over the Nyquist rate even at a 1.0V supply operation. The cascode compensation technique on a low-impedance path implemented in the two-stage amplifiers of the SHA and MDAC simultaneously achieves the required operation speed and phase margin with more reduced power consumption than the Miller compensation technique. Low-glitch dynamic latches in sub-ranging flash ADCs reduce kickback-noise referred to the differential input stage of the comparator by isolating the input stage from output nodes to improve system accuracy. The proposed low-noise current and voltage references based on triple negative T.C. circuits are employed on chip with optional off-chip reference voltages. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.70LSB and 1.79LSB, respectively. The ADC shows a maximum SNDR of 64.5dB and a maximum SFDR of 78.0dB at 100MS/s, respectively. The ABC with an active die area of $1.22mm^2$ consumes 42.0mW at 100MS/s and a 1.2V supply, corresponding to a FOM of 0.31pJ/conv-step.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.1
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• pp.129-136
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• 2004

In this paper, we proposed quad variable rates ADPCM coding method for efficient speech transmission and real time porcessing is implemented on TMS320C6711-DSP. The modified ADPCM with four variable coding rates, 16[kbps], 24[kbps], 32[kbps] and 40[kbps] are used for speech window samples for good quality speech transmission at a small data bits and real time encoding and decoding is implemented using DSP. ZCR is used to identify the influence of the noise on the speech signal and to decide the rate change threshold. For noise superior signals, low coding rates are applied to minimize data bit and for noise inferior signals, high coding rates are applied to enhance the speech quality. In most speech telecommunications, silent period takes more than half of the signals, speech quality close to 40[kbps] can be obtained at comparabley low data bits and this is shown by simulation and experiments. TMS320C6711-DSK board has 128K flash memory and performance of 1333MIPS and has meets the requirements for real time implementation of proposed coding algorithm.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.989-992
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• 1999

Battery로 작동되고, 소형인 제품들도 다양한 기능은 물론이고, 다양한 입출력 장치를 갖추고, 실시간으로 처리하는 시스템이 많이 요구되고 있는 실정이며, 점차 더욱 더 요구될 것으로 전망된다. 더욱이 포터블 기기는 일반적으로 MCU의 내부에 제한된 ROM type 메모리를 내장하게 되면, 데이터 메모리로 SRAM 및 flash memory를 갗추고 있다. 따라서 이러한 제한된 하드웨어 환경하에서 많은 기능을 수행해야 하는 경우가 많다. 여러 기능을 시간적인 간격으로 배분하거나, 기능 자체를 서로 배분하면서, 서로 융합하는 등의 여러 가지 기능을 수행하려다보면, 당연히 메인 소프트웨어 구조가 복잡해지며 대부분 어셈블리나 C와 같은 linear한 구조를 가지는 language로 개발되기 때문에 효과적인 프로그램 구조를 세우기는 쉽지 않다. 본 논문에서는 이를 위해 좀더 규격화된 방법을 제시하고자 한다. 보다 구체적인 구조를 연구할 목적으로 다양한 테스크를 수행하여야 하는 시스템이면서 프로세서가 필요한 포터블 기기의 한 응용 제품인 MP3 Player 에서 요구되는 job scheduling을 연구한다. 필요한 작업의 종류는 가장 부하가 많이 걸리는 압축된 MP3 file을 다시 복원시켜주는 codec 부분과 일정 시간 간격을 가지고 수행하여야 하는 외부 키보드 입력과 실시간으로 시간을 계산하는 타이머 기능, 그리고 LCD에 시간의 변화를 표시하여 주어야한다. 이와같이 수시로 작업이 발생하지만 시간 점유율이 중간 정도인 LCD 컨트롤과 메모리 컨트롤 등이다. 프로세서의 속도를 최소한으로 줄이면서 스케줄링에 의해 시간 문제를 해결하는 방법을 제시하도록 한다. 이는 기초과학 수준이 높은 북방권 국가들의 과학자들이 주로 활용되고 있다는 점에서도 잘 알 수 있으며 우리의 과학기술 약점을 보완하는 원천으로써 외국인 연구 인력이 대안이 되고 있음을 시사한다. 본 연구에서는 한국 연구 조직에서 일하는 외국인 연구자들의 동기 및 성과에 영향을 미치는 많은 요인들을 확인할 수 있었다. 상관관계, 분산분석, 회귀분석 등을 통해 활용 성과에 미치는 영향 요인들을 도출하였다. 설문 분석을 통하여 동기 및 성과 사이에는 강한 상관관계가 존재하는 것을 확인할 수 있었으며 이는 전통적인 동기 이론들과 부합한다. 대부분의 변수가 동기 및 성과에 동시에 영향을 미치는 것으로 조사되었으며 그중에서도 조직 협력 문화, 외국인 연구자의 의사소통 및 협력성, 외국인 연구자의 연구 능력 관련 변수들 및 연구 프로젝트의 기술수명주기, 외국인 연구자의 기존 기술지식의 흡수 등이 가장 중요한 변수로 나타났다. 이는 우리가 주로 중국 및 러시아 과학자들을 활용하여 상업화하는 외국인 연구인력 활용 패턴과도 일치하는 결과이다. 즉 우호적인 조직문화를 가지고 있는 연구 조직에서, 이미 과학기술 지식을 많이 가지고 있고 연구 능력도 높은 외국인 과학기술자를, 한국에서 기술이 태동 또는 성장하고 있는 연구 분야에서 활용하는 것이 가장 성과가 좋다는 사실을 확인시켜 주고 있다. 국내에서 최초로 수행된 본 연구는 외국인 연구 인력의 활용 성과가 매우 높으며, 우리의 과학기술혁신시스템을 보완하는 유효한 수단으로써 외국인 연구 인력이 중요한 대안이 될 수 있음을 발견하였다. 외국인 연구 인력을 잘 활용하기 위하여 문제점 및 개선방안을 활용 환경, 연구 인력이 중요한 대안이 될 수

• Science of Emotion and Sensibility
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• v.10 no.4
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• pp.511-521
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• 2007

It is very important that design based on preference of consumers who continuously change. Therefore, the method that can decide on the design concept which a consumer can prefer in future points of time that a design is released is necessary. There may be various ways to decide a design concept, but trend analysis is one of the best ways to be able to satisfy consumer preference. The purpose of this study is to provide a process that can give a direction of MP3 player design oriented consumer emotion. For the purpose, we considered about trend analysis as the ways that can present the design direction that can grasp a change of continuous preference, and a consumer can prefer with early bases in future points of time of a consumer. In this empirical research, we decided on design elements and levels of the elements after collecting 228 MP3 players released from 2000 to 2007, and carried out trend analysis through homogeneity analysis by SPSS program. In the result, we knew that future consumers also will regard emotional experience consumption as important. So, MP3 player design will be developed into consumer emotion-oriented design. We predict 4 trends for a future MP3 player design. 1. Development of high-priced MP3 player with various multimedia functions. 2. Development of MP3 player with basic functions. 3. Development of new convergence products with MP3 function. 4. Development of new MP3 player based on flash memory. If designers can infer a future MP3 player design from this design trend results, the probability that can occupy competitive advantage in their competitions will be high. Therefore this study can be useful.

• KIPS Transactions on Computer and Communication Systems
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• v.1 no.2
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• pp.71-78
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• 2012

The digital tachograph is a device that automatically records speed and distance of a vehicle, together with the driver's activity and vehicle status at an accident. It records vehicle speed, break status, acceleration, engine RPM, longitude and latitude of GPS, accumulated distance, and so on. European Commission regulation made digital tachographs mandatory for all trucks from 2005. Republic of Korea made digital tachographs mandatory for all new business vehicles from 2011 and is widening the range of vehicles that must install digital tachographs year by year. This device is used to analyze driver's daily driving information and car accidents. Under a car accident that makes the device reliability unpredictable, it is very important to store driving information with maximum reliability for its original mission. We designed and implemented a practical digital tachograph. This paper presents a storage scheme that consists of a first storage device with small capacity at a high reliability and a second storage device with large capacity at a low cost in order to reliably records data with a hardware at a low cost. The first storage device records data in a SLC NAND flash memory in a log-structured style. We present a reverse partial scan that overcomes the slow scan time of log-structured storages at the boot stage. The scheme reduced the scan time of the first storage device by 1/50. In addition, our design includes a scheme that fast stores data at a moment of accident by 1/20 of data transfer time of a normal method.

• The KIPS Transactions:PartA
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• v.16A no.5
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• pp.357-368
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• 2009

Mobile IP storage has been proposed to overcome storage limitation in the flash memory and hard disks. It provides almost capacity-free space for mobile devices over wireless IP networks. However, battery lifetime of the mobile devices is reduced rapidly because of power consumption with continuous use of a WLAN device when multimedia contents are being streamed through the mobile IP storage. This paper proposes an energy-efficient WLAN device power control technique for streaming multimedia contents with the mobile IP storage. The proposed technique consists of a prefetch buffer input/output module, a WLAN device power control module, and a reconfigurable prefetch buffer module. Besides, it adaptively determines the size of the prefetch buffer according to a quality of the multimedia contents, and it dynamically controls the power mode of the WLAN device on the basis of power on-off operations while streaming the multimedia contents. We evaluate the performance of the proposed technique on a PXA270-based mobile device that employs the embedded linux 2.6.11, Intel iSCSI reference codes, and a WLAN device. Extensive experiments reveal that the proposed technique can save the energy consumption of the WLAN device up to 8.5 times with QVGA multimedia contents, as compared with no power control.

• The KIPS Transactions:PartD
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• v.11D no.2
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• pp.443-452
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• 2004

The paper presents an intelligent space management system for ubiquitous computing. The system is basically a home/office automation system that could control light, electronic key, and home appliances such as TV and audio. On top of these basic capabilities, there are four elegant features in the system. First, we can access the system using either a cellular Phone or using a browser on the PC connected to the Internet, so that we control the system at any time and any place. Second, to provide more human-oriented interface, we integrate voice recognition functionalities into the system. Third, the system supports not only reactive services but also proactive services, based on the regularities of user behavior. Finally, by exploiting embedded technologies, the system could be run on the hardware that has less-processing power and storage. We have implemented the system on the embedded board consisting of StrongARM CPU with 205MHz, 32MB SDRAM, 16MB NOR-type flash memory, and Relay box. Under these hardware platforms, software components such as embedded Linux, HTK voice recognition tools, GoAhead Web Server, and GPIO driver are cooperated to support user-friendly intelligent space.

• Journal of the Korean Vacuum Society
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• v.15 no.6
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• pp.630-636
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• 2006

Scale down of semiconductor gate pattern will make progress centrally line width into transistor according to the high integration and high density of flash memory semiconductor. Recently, the many researchers are in the process of developing research for using the ONO(oxide-nitride-oxide) technology for the gate pattern give body to line breadth of less 100 nm. Therefore, etch rate and etch profile of the line width detail of less 100 nm affect important factor in a semiconductor process. In case of increasing of the platen power up to 50 W at the ICP etcher, etch rate and PR selectivity showed good result when the platen power of ICP etcher has 100 W. Also, in case of changing of HBr gas flux at the platen power of 100 W, etch rate was decreasing and PR selectivity is increasing. We founded terms that have etch rate 320 nm/min, PR selectivity 3.5:1 and etch slope have vertical in the case of giving the platen power 100 W and HBr gas 35 sccm at the ICP etcher. Also notch was not formed.