• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.1-5
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• 2009

A new pixel circuit for Active Matrix Organic Light Emitting Diodes (AMOLEDs), based on the polycrystalline silicon thin film transistors (Poly-Si TFTs), was proposed and verified by SMART SPICE simulation. One driving and six switching TFTs and one storage capacitor were used to improve display image uniformity without any additional control signal line. The proposed pixel circuit compensates an inevitable threshold voltage variation of Poly-Si TFTs and also compensates the degradation of OLED at low power supply voltage($V_{DD}$). The simulation results show that the proposed pixel circuit successfully compensates the variation of OLED driving current within 0.8% compared with 20% of the conventional pixel circuit.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.11
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• pp.765-770
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• 2001

Metal-ferroelectric-insulator- semiconductor(MFTS) devices by using rapid thermal annealed (RTA) LiNbO$_3$/AIN/Si(100) structures were successfully fabricated and demonstrated nonvolatile memory operations. Metal-insulator-semiconductor(MIS) C-V properties with high dielectric AIN thin films showed no hysteresis and good interface properties. The dielectric constant of the AIN film calculated from the capacitance at the accumulation region in the capacitance-voltage(C-V) characteristics was about 8. The C-V characteristics of MFIS capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 23. The memory window width was about 1.2 V at the gate voltage of $\pm$5 V ranges. Typical gate leakage current density of the MFIS structure was the order of 10$^{-9}$ A/$\textrm{cm}^2$ at the range of within $\pm$500 kV/cm. The ferroelectric capacitors showed no polarization degradation up to about 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulse(peak-to-peak 8 V, 50 % duty cycle) in the 500 kHz.

• Korean Journal of Materials Research
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• v.16 no.3
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• pp.178-182
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• 2006

A single electro-discharge-sintering (EDS) pulse (1.0 kJ/0.7 g), from a $300{\mu}F$ capacitor, was applied to atomized spherical Ti-6Al-4V powder in a low vacuum to produce porous-surfaced implant compacts. A solid core surrounded by a porous layer was formed by a discharge in the middle of the compact. XPS (X-ray photoelectron spectroscopy) was used to study the surface characteristics of the implant material. C, O, and Ti were the main constituents, with smaller amounts of Al, V, and N. The implant surface was lightly oxidized and was primarily in the form of $TiO_2$ with a small amount of metallic Ti. A lightly etched EDS implant sample showed the surface form of metallic Ti, indicating that EDS breaks down the oxide film of the as-received Ti-6Al-4V powder during the discharge process. The EDS Ti-6Al-4V implant surface also contained small amounts of aluminum oxide in addition to $TiO_2$. However, V detected in the EDS Ti-6Al-4V implant surface, did not contribute to the formation of the oxide film..

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.3
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• pp.344-349
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• 2006

The low-temperature processing is very important for fabrication of the very large scale ($60{\sim}70nm$) semiconductor devices since the submicron transistors are sensitive to the thermal budget. Hence, in this work, we propose a noble low-temperature LPCVD (Low-Pressure Chemical Vapor Deposition) process for the $SiO_2$ film and evaluate the electrical reliability of the LTO (Low-Temperature Oxide) by making the capacitors with ONO (Oxide/Nitride/Oxide) structure. The leak current of the LTO was similar to that of the high-temperature wet oxide until the electric field was lower than 5 MV/cm. However, when the electric field was higher, the LTO showed much better characteristics.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.1 s.34
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• pp.21-26
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• 2005

The field effect transistors (FETs) were fabricated ell $Y_2O_3/Si(100)$ substrates by the conventional memory processes and sol-gel process using $(Bi,La)Ti_3O_{12}(BLT)$ ferroelectric gate materials. The remnant polarization ($2Pr = Pr^+-Pr^-$) int Pt/BLT/Pt/Si capacitors increased from $22 {\mu}C/cm^2$ to $30{\mu}C/ cm^2$ at 5V as the annealing temperature increased from $700^{\circ}C$ to $750^{\circ}C$. There was no drastic degradation in the polarization values after applying the retention read pulse for $10^{5.5}$ seconds. The capacitance-voltage data of $Pt/BLT/Y_2O_3/Si$ capacitors at 5V input voltage showed that the memory window voltage decreased from 1.4V to 0.6V as the annealing temperature increased from $700^{\circ}C$ to $750^{\circ}C$. The leakage current of the $Pt/BLT/Y_2O_3/Si$ capacitors annealed at $750^{\circ}C$ was about $510^{-8}A/cm^2$ at 5V. From the drain currents versus gate voltages ($V_G$) for $Pt/BLT/Y_2O_3/Si(100)$ FET devices, the memory window voltages increased from 0.3V to 0.8V with increasing tile $V_G$ from 3V to 5V.

• Journal of Information Display
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• v.7 no.4
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• pp.21-23
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• 2006

We developed a 4.5" 192${\times}$64 active matrix organic light-emitting diode display on a glass using organic thin-film transistor (OTFT) switching-arrays with two transistors and a capacitor in each sub-pixel. The OTFTs has bottom contact structure with a unique gate insulator and pentacene for the active layer. The width and length of the switching OTFT is 800${\mu}m$ and lO${\mu}m$ respectively and the driving OTFT has 1200${\mu}m$ channel width with the same channel length. On/off ratio, mobility, on-current of switching OTFT and on-current of driving OTFT were $10^6,0.3{\sim}0.5$ $cm^2$/V·sec, order of 10 ${\mu}A$ and over 100 ${\mu}A$, respectively. AMOLEDs composed of the OTFT switching arrays and OLEDs made using vacuum deposition method were fabricated and driven to make moving images, successfully.

• Korean Journal of Materials Research
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• v.25 no.2
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• pp.107-112
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• 2015

The oxide films formed on etched aluminum foils play an important role as dielectric layers in aluminum electrolytic capacitors. $Y_2O_3$-doped $ZrO_2$ (YZ) films were coated on the etched aluminum foils by sol-gel dip coating, and the electrical properties of YZ-coated Al foils were characterized. YZ films annealed at $450^{\circ}C$ were crystallized into a cubic phase, and as the $Y_2O_3$ doping content increased, the unit cell of $ZrO_2$ expanded and the grain size decreased. The etch pits of Al foils were filled by YZ sol when it dried at atmospheric pressure after repeating for several times, but this step could essentially be avoided when being dried in a vacuum. YZ-coated foils indicated that the specific capacitance and dissipation factor were $2-2.5{\mu}F/cm^2$ and 2-4 at 1 kHz, respectively, and the leakage current and withstanding voltage of films approximately 200 nm thick were $5{\times}10^{-4}A$ at 21 V and 22 V, respectively. After being anodized at 500 V, the foils exhibited a specific capacitance and dissipation factor of $0.6-0.7{\mu}F/cm^2$ and 0.1-0.2, respectively, at 1 kHz, while the leakage current and withstanding voltage were $2{\times}10^{-4}-3{\times}10^{-5}A$ at 400 V and 420-450 V, respectively. This suggests that YZ film is a promising dielectric that can be used in high voltage Al electrolytic capacitors.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.96-99
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• 2007

The effects of post-annealing of high-k $HfO_2$ thin films grown by atomic layer deposition method were investigated by the annealing treatments of $400-600^{\circ}C$. $Pt/HfO_2/p-Si\;MOS$ capacitor structures were fabricated, and then the capacitance-voltage and current-voltage characteristics were measured to analyze the electrical characteristics of dielectric layers. The X-ray diffraction analyses revealed that the $500^{\circ}C-annealed\;HfO_2$ film remained to be amorphous, and the $600^{\circ}C-annealed\;HfO_2$ film was crystallized. The annealing treatment at $500^{\circ}C$ resulted in the highest capacitance and the lowest leakage current due to the reduction of defects in the $HfO_2$ films and non-crystallization. Our results suggest that post-annealing treatments are a critical factor in improving the characteristics of gate dielectric layer.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1295-1296
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• 2006

수소화된 비정질 실리콘 박막 트랜지스터(a-Si:H TFT)의 이력 현상이 능동형 유기 발광 다이오드(Active-Matrix Organic Light Emitting Diode) 디스플레이 패널을 구동할 경우에, 발생할 수 있는 잔상(Residual Image) 문제를 단위 소자 및 회로에서 실험을 통하여 규명하였다. 게이트 시작 전압을 바꾸어 VGS-ID 특성을 측정할 경우, 게이트 시작 전압이 5V에서 시작한 VGS-ID 곡선이 10V에서 시작한 VGS-ID 곡선에 비해 왼쪽으로 0.15V 이동하였다. 이러한 결과는 게이트 시작 전압의 차이에 의해 발생한 트랩된 전하량(Trapped Charge) 변화로 설명할 수 있다. 또한, 인가하는 게이트 전압 간격을 0.5V에서 0.05V로 감소시켰을 때 전하 디트래핑 비율의 변화(Charge De-trapping Rate)로 인하여, 이력 현상(Hysteresis Phenomenon)으로 인한 단위 소자에서의 문턱전압의 변화가 0.78V에서 0.39V로 감소함을 관찰하였다. 제작된 2-TFT 1-Capacitor의 ANGLED 화소에서 (n-1)번째 프레임에서의 OLED 전류가 (n)번째 프레임에서의 OLED 전류에 35%의 전류오차를 발생시키는 것을 측정 및 분석하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.271-274
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• 2003

[ $Sr_xBa_{1-x}Nb_2O_6$ ] (SBN, $0.25{\leq}x{\leq}0.75$) ceramic is a ferroelectric material with tetragonal tungsten bronze (TTB) type structure, which has a high pyroelectric coefficient and a nonlinear electro-optic coefficient value. In spite of its advantages, SBN has not been investigated well compared to other ferroelectric materials with perovskite structure. In this study, SBN thin film was manufactured by ion beam sputtering technique using the prepared SBN target in $Ar/O_2$ atmosphere. SBN30 thin films of different thickness were pre-deposited as a seed layer on $Pt(100)/TiO_2/SiO_2/Si$ substrate followed by SBN60 deposition up to $4500\;{\AA}$ in thickness. As-deposited SBN60/SBN30 layer was heat-treated at different temperatures of 650, 700, 750, and $800\;^{\circ}C$ in air, respectively, The crystallinity and orientation behavior as well as electric properties of SBN60/SBN30 multi-layer were examined. The deposited layer was uniform and the orientation was shown primarily along (001) plane from XRD pattern. There was difference in the crystal structure with heat-treatment temperature, and the electric properties depended on the heating temperature and the seed-layer thickness. In electric properties of Pt/SBN60/SBN30/Pt thin film capacitor prepared, the remnant polarization (2Pr) value was $15\;{\mu}C/cm^2$, the coercive field (Ec) 65 kV/cm, and the dielectric constant 1492, respectively.